參數(shù)資料
型號(hào): PCA9674
廠商: NXP Semiconductors N.V.
英文描述: Remote 8-bit I/O expander for Fm+ I2C-bus with interrupt
中文描述: 遠(yuǎn)程8位I / O擴(kuò)展調(diào)頻I2C總線的中斷
文件頁(yè)數(shù): 14/34頁(yè)
文件大?。?/td> 179K
代理商: PCA9674
PCA9674_PCA9674A_2
NXP B.V. 2006. All rights reserved.
Product data sheet
Rev. 02 — 12 October 2006
14 of 34
NXP Semiconductors
PCA9674/74A
Remote 8-bit I/O expander for Fm+ I
2
C-bus with interrupt
8.3 Reading from a port (Input mode)
All ports programmed as input should be set to logic 1. To read, the master
(microcontroller) first addresses the slave device after it receives the interrupt. By setting
the last bit of the byte containing the slave address to logic 1 the Read mode is entered.
The data bytes that follow on the SDA are the values on the ports.
If the data on the input port changes faster than the master can read, this data may be
lost.
Fig 14. Write mode (output)
A5 A4 A3 A2 A1 A0
0
A
S A6
slave address
START condition
R/W
acknowledge
from slave
002aac120
P6
1
P7
data 1
A
acknowledge
from slave
1
2
3
4
5
6
7
8
SCL
9
SDA
A
acknowledge
from slave
write to port
data output from port
t
v(Q)
DATA 2 VALID
P5
data 2
P4 P3 P2 P1 P0
P7
P4 P3 P2 P1 P0
0
P5
P5
t
v(Q)
DATA 1 VALID
P5 output voltage
I
trt(pu)
I
OH
P5 pull-up output current
t
d(rst)
INT
A LOW-to-HIGH transition of SDA while SCL is HIGH is defined as the STOP condition (P). Transfer of data can be stopped
at any moment by a STOP condition. When this occurs, data present at the last acknowledge phase is valid (Output mode).
Input data is lost.
Fig 15. Read input port register
A5 A4 A3 A2 A1 A0
1
A
S A6
slave address
START condition
R/W
acknowledge
from slave
002aac121
data from port
A
acknowledge
from master
SDA
1
no acknowledge
from master
read from
port
data into
port
data from port
DATA 1
DATA 4
INT
DATA 4
DATA 2
DATA 3
P
STOP
condition
t
v(Q)
t
d(rst)
t
h(D)
t
su(D)
t
d(rst)
相關(guān)PDF資料
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