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| 型號(hào)： | PCA9673DK |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | Remote 16-bit I/O expander for Fm+ I2C-bus with interrupt and reset |
| 中文描述： | 18 I/O, PIA-GENERAL PURPOSE, PDSO24 |
| 封裝： | 3.90 MM, 0.635 MM PITCH, PLASTIC, MO-137, SOT556-1, SSOP-24 |
| 文件頁(yè)數(shù)： | 20/33頁(yè) |
| 文件大?。?/td> | 185K |
| 代理商： | PCA9673DK |
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PCA9673_1
NXP B.V. 2007. All rights reserved.
Product data sheet
Rev. 01 — 1 February 2007
20 of 33
NXP Semiconductors
PCA9673
Remote 16-bit I/O expander for Fm+ I
2
C-bus with interrupt and reset
[1]
The power-on reset circuit resets the I
2
C-bus logic with V
DD
< V
POR
and set all I/Os to logic 1 (with current source to V
DD
).
Each bit must be limited to a maximum of 25 mA and the total package limited to 400 mA due to internal busing limits.
[2]
[3]
The value is not tested, but verified on sampling basis.
13. Dynamic characteristics
Table 6.
V
DD
= 2.3 V to 5.5 V; V
SS
= 0 V; T
amb
=
40
°
C to +85
°
C; unless otherwise specified.
Symbol
Parameter
Conditions
Dynamic characteristics
Standard mode
I
2
C-bus
Min
0
4.7
Fast mode I
2
C-bus
Fast-mode
Plus I
2
C-bus
Min
0
0.5
Unit
Max
100
-
Min
0
1.3
Max
400
-
Max
1000
-
f
SCL
t
BUF
SCL clock frequency
bus free time between a
STOP and START condition
hold time (repeated) START
condition
set-up time for a repeated
START condition
set-up time for STOP
condition
data hold time
data valid acknowledge
time
[1]
data valid time
[2]
data set-up time
LOW period of the SCL clock
HIGH period of the SCL
clock
fall time of both SDA and
SCL signals
rise time of both SDA and
SCL signals
pulse width of spikes that
must be suppressed by the
input filter
[6]
Port timing; C
L
≤
100 pF (see
Figure 16
and
Figure 17
)
t
v(Q)
data output valid time
t
su(D)
data input set-up time
t
h(D)
data input hold time
Interrupt timing; C
L
≤
100 pF (see
Figure 16
and
Figure 17
)
t
v(D)
data input valid time
t
d(rst)
reset delay time
Reset timing (see
Figure 27
)
t
w(rst)
reset pulse width
t
rec(rst)
reset recovery time
t
rst
reset time
kHz
μ
s
t
HD;STA
4.0
-
0.6
-
0.26
-
μ
s
t
SU;STA
4.7
-
0.6
-
0.26
-
μ
s
t
SU;STO
4.0
-
0.6
-
0.26
-
μ
s
t
HD;DAT
t
VD;ACK
0
-
0
-
0
-
ns
μ
s
0.3
3.45
0.1
0.9
0.05
0.45
t
VD;DAT
t
SU;DAT
t
LOW
t
HIGH
300
250
4.7
4.0
-
-
-
-
50
100
1.3
0.6
-
-
-
-
50
50
0.5
0.26
450
-
-
-
ns
ns
μ
s
μ
s
t
f
[4][5]
-
300
20 + 0.1C
b
[3]
300
-
120
ns
t
r
-
1000
20 + 0.1C
b
[3]
300
-
120
ns
t
SP
-
50
-
50
-
50
ns
-
0
4
4
-
-
-
0
4
4
-
-
-
0
4
4
-
-
μ
s
μ
s
μ
s
-
-
4
4
-
-
4
4
-
-
4
4
μ
s
μ
s
4
0
-
-
-
4
0
-
-
-
4
0
-
-
-
ns
ns
ns
100
100
100
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| PCA9673DK,118 | 功能描述:接口-I/O擴(kuò)展器 16BIT I2C FM+ QBGPIO RoHS:否 制造商:NXP Semiconductors 邏輯系列: 輸入/輸出端數(shù)量: 最大工作頻率:100 kHz 工作電源電壓:1.65 V to 5.5 V 工作溫度范圍:- 40 C to + 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:HVQFN-16 封裝:Reel |
| PCA9673DK-T | 功能描述:接口-I/O擴(kuò)展器 16BIT I2C FM+ QBGPIO INT-RS PU RoHS:否 制造商:NXP Semiconductors 邏輯系列: 輸入/輸出端數(shù)量: 最大工作頻率:100 kHz 工作電源電壓:1.65 V to 5.5 V 工作溫度范圍:- 40 C to + 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:HVQFN-16 封裝:Reel |
| PCA9673D-T | 功能描述:接口-I/O擴(kuò)展器 16BIT I2C FM+ QBGPIO INT-RS PU RoHS:否 制造商:NXP Semiconductors 邏輯系列: 輸入/輸出端數(shù)量: 最大工作頻率:100 kHz 工作電源電壓:1.65 V to 5.5 V 工作溫度范圍:- 40 C to + 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:HVQFN-16 封裝:Reel |
| PCA9673PW | 功能描述:接口-I/O擴(kuò)展器 16BIT I2C FM+ QBGPIO INT-RS PU RoHS:否 制造商:NXP Semiconductors 邏輯系列: 輸入/輸出端數(shù)量: 最大工作頻率:100 kHz 工作電源電壓:1.65 V to 5.5 V 工作溫度范圍:- 40 C to + 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:HVQFN-16 封裝:Reel |
| PCA9673PW,112 | 功能描述:接口-I/O擴(kuò)展器 16BIT I2C FM+ QBGPIO RoHS:否 制造商:NXP Semiconductors 邏輯系列: 輸入/輸出端數(shù)量: 最大工作頻率:100 kHz 工作電源電壓:1.65 V to 5.5 V 工作溫度范圍:- 40 C to + 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:HVQFN-16 封裝:Reel |
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