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參數資料
| 型號： | PCA9505DGG,112 |
| 廠商： | NXP Semiconductors |
| 文件頁數： | 6/34頁 |
| 文件大小： | 0K |
| 描述： | IC I/O EXPANDER I2C 40B 56TSSOP |
| 產品培訓模塊： | I²C Bus Fundamentals |
| 特色產品： | NXP - I2C Interface |
| 標準包裝： | 35 |
| 接口： | I²C |
| 輸入/輸出數： | 40 |
| 中斷輸出： | 是 |
| 頻率 - 時鐘： | 400kHz |
| 電源電壓： | 2.3 V ~ 5.5 V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 56-TFSOP（0.240"，6.10mm 寬） |
| 供應商設備封裝： | 56-TSSOP |
| 包裝： | 管件 |
| 包括： | POR |
| 產品目錄頁面： | 824 (CN2011-ZH PDF) |
| 其它名稱： | 568-4244-5 935284486112 PCA9505DGG |
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PCA9505_9506
All information provided in this document is subject to legal disclaimers.
NXP B.V. 2010. All rights reserved.
Product data sheet
Rev. 4 — 3 August 2010
14 of 34
NXP Semiconductors
PCA9505/06
40-bit I2C-bus I/O port with RESET, OE and INT
8.
Characteristics of the I2C-bus
The I2C-bus is for 2-way, 2-line communication between different ICs or modules. The two
lines are a serial data line (SDA) and a serial clock line (SCL). Both lines must be
connected to a positive supply via a pull-up resistor when connected to the output stages
of a device. Data transfer may be initiated only when the bus is not busy.
8.1 Bit transfer
One data bit is transferred during each clock pulse. The data on the SDA line must remain
stable during the HIGH period of the clock pulse as changes in the data line at this time
will be interpreted as control signals (see Figure 7).
8.1.1 START and STOP conditions
Both data and clock lines remain HIGH when the bus is not busy. A HIGH-to-LOW
transition of the data line while the clock is HIGH is defined as the START condition (S). A
LOW-to-HIGH transition of the data line while the clock is HIGH is defined as the STOP
condition (P) (see Figure 8).
8.2 System configuration
A device generating a message is a ‘transmitter’; a device receiving is the ‘receiver’. The
device that controls the message is the ‘master' and the devices which are controlled by
the master are the ‘slaves' (see Figure 9).
Fig 7.
Bit transfer
mba607
data line
stable;
data valid
change
of data
allowed
SDA
SCL
Fig 8.
Definition of START and STOP conditions
mba608
SDA
SCL
P
STOP condition
S
START condition
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相關代理商/技術參數 |
參數描述 |
|---|---|
| PCA9506 | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:40-bit I2C-bus I/O port with RESET, OE and INT |
| PCA9506BS | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:40-bit I2C-bus I/O port with RESET, OE and INT |
| PCA9506BS,118 | 功能描述:接口-I/O擴展器 I/O EXPANDER I2C RoHS:否 制造商:NXP Semiconductors 邏輯系列: 輸入/輸出端數量: 最大工作頻率:100 kHz 工作電源電壓:1.65 V to 5.5 V 工作溫度范圍:- 40 C to + 85 C 安裝風格:SMD/SMT 封裝 / 箱體:HVQFN-16 封裝:Reel |
| PCA9506BS,118-CUT TAPE | 制造商:NXP 功能描述:PCA9506 Series 40-Bit I2C-Bus I/O Port with RESET OE and INT - HVQFN - 56 |
| PCA9506DGG | 功能描述:接口-I/O擴展器 I/O EXPANDER I2C RoHS:否 制造商:NXP Semiconductors 邏輯系列: 輸入/輸出端數量: 最大工作頻率:100 kHz 工作電源電壓:1.65 V to 5.5 V 工作溫度范圍:- 40 C to + 85 C 安裝風格:SMD/SMT 封裝 / 箱體:HVQFN-16 封裝:Reel |
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