
Philips Semiconductors
Product data
P89C660/P89C662/P89C664/
P89C668
80C51 8-bit Flash microcontroller family
16KB/32KB/64KB ISP/IAP Flash with 512B/1KB/2KB/8KB RAM
2002 Oct 28
19
Table 3.
6-clock mode
Serial Clock Rates
BIT FREQUENCY (kHz) AT f
OSC
6 MHz
8 MHz
CR2
CR1
CR0
3 MHz
12 MHz
2
15 MHz
2
117
1
134
1
156
1
188
1
31
250
1
500
1
1.22 < 52.1
0 < 250
f
OSC
DIVIDED BY
128
112
96
80
480
60
30
48
×
(256 – (reload value Timer 1))
Reload value Timer 1 in Mode 2.
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
23
27
31
37
6.25
50
100
47
54
63
75
12.5
100
200
62.5
71
83.3
100
17
133
1
267
1
94
107
1
125
1
150
1
25
200
1
400
1
0.24 < 62.5
0 < 255
0.49 < 62.5
0 < 254
0.65 < 55.6
0 < 253
0.98 < 50.0
0 < 251
12-clock mode
BIT FREQUENCY (kHz) AT f
OSC
12 MHz
16 MHz
CR2
CR1
CR0
6 MHz
24 MHz
3
30 MHz
3
117
1
134
1
156
1
188
1
31
250
1
500
1
1.22 < 52.1
0 < 250
f
OSC
DIVIDED BY
256
224
192
160
960
120
60
96
×
(256 – (reload value Timer 1))
Reload value Timer 1 in Mode 2.
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
23
27
31
37
6.25
50
100
47
54
63
75
12.5
100
200
62.5
71
83.3
100
17
133
1
267
1
94
107
1
125
1
150
1
25
200
1
400
1
0.24 < 62.5
0 < 255
0.49 < 62.5
0 < 254
0.65 < 55.6
0 < 253
0.98 < 50.0
0 < 251
NOTES:
1. These frequencies exceed the upper limit of 100 kHz of the I
2
C-bus specification and cannot be used in an I
2
C-bus application.
2. At f
OSC
= 12 MHz/15 MHz the maximum I
2
C bus rate of 100 kHz cannot be realized due to the fixed divider rates.
3. At f
OSC
= 24 MHz/30 MHz the maximum I
2
C bus rate of 100 kHz cannot be realized due to the fixed divider rates.