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Chapter 23 1024 KByte Flash Module (S12XFTM1024K5V2)
MC9S12XE-Family Reference Manual Rev. 1.07
Freescale Semiconductor
845
P-Flash Sector
— The P-Flash sector is the smallest portion of the P-Flash memory that can be erased.
The P-Flash sector consists of four 256 byte rows for a total of 1024 bytes.
Program IFR
— Nonvolatile information register located in the P-Flash block that contains the Device
ID and the Program Once field. The Program IFR is visible in the global memory map by setting the
PGMIFRON bit in the MMCCTL1 register.
23.1.2
Features
23.1.2.1
P-Flash Features
1024 Kbytes of P-Flash memory composed of three 256 Kbyte Flash blocks and two 128 Kbyte
Flash blocks. The 256 Kbyte Flash block consists of two 128 Kbyte sections each divided into
128 sectors of 1024 bytes. The 128 Kbyte Flash blocks are each divided into 128 sectors of 1024
bytes.
Single bit fault correction and double bit fault detection within a phrase during read operations.
Automated program and erase algorithm with verify and generation of ECC parity bits.
Fast sector erase and phrase program operation.
Ability to program up to one phrase in each P-Flash block simultaneously.
Flexible protection scheme to prevent accidental program or erase of P-Flash memory.
23.1.2.2
Emulated EEPROM Features
Up to 4 Kbytes of emulated EEPROM (EEE) accessible as 4 Kbytes of RAM
Flexible protection scheme to prevent accidental program or erase of data
Automatic EEE file handling using an internal Memory Controller
Automatic transfer of valid EEE data from D-Flash memory to buffer RAM on reset
Ability to monitor the number of outstanding EEE related buffer RAM words left to be
programmed into D-Flash memory
Ability to disable EEE operation and allow priority access to the D-Flash memory
Ability to cancel all pending EEE operations and allow priority access to the D-Flash memory
23.1.2.3
User D-Flash Features
Up to 32 Kbytes of D-Flash memory with 256 byte sectors for user access
Dedicated commands to control access to the D-Flash memory over EEE operation
Single bit fault correction and double bit fault detection within a word during read operations
Automated program and erase algorithm with verify and generation of ECC parity bits
Fast sector erase and word program operation
Ability to program up to four words in a burst sequence