參數(shù)資料
型號(hào)： P89LPC9341FDH,512
廠商： NXP Semiconductors
文件頁(yè)數(shù)： 59/94頁(yè)
文件大?。?/td> 0K
描述： IC 80C51 MCU FLASH 8K 28-TSSOP
標(biāo)準(zhǔn)包裝： 51
系列： LPC900
核心處理器： 8051
芯體尺寸： 8-位
速度： 18MHz
連通性： I²C，SPI，UART/USART
外圍設(shè)備： 欠壓檢測(cè)/復(fù)位，POR，PWM，WDT
輸入/輸出數(shù)： 26
程序存儲(chǔ)器容量： 8KB（8K x 8）
程序存儲(chǔ)器類型： 閃存
RAM 容量： 256 x 8
電壓 - 電源 (Vcc/Vdd)： 2.4 V ~ 3.6 V
數(shù)據(jù)轉(zhuǎn)換器： A/D 8x8b; D/A 2x8b
振蕩器型： 內(nèi)部
工作溫度： -40°C ~ 85°C
封裝/外殼： 28-TSSOP（0.173"，4.40mm 寬）
包裝： 管件
配用： 568-1758-ND - BOARD EVAL FOR LPC93X MCU FAMILY
其它名稱： 935288632512
P89LPC9331_9341_9351_9361
All information provided in this document is subject to legal disclaimers.
NXP B.V. 2012. All rights reserved.
Product data sheet
Rev. 5.1 — 20 August 2012
62 of 94
NXP Semiconductors
P89LPC9331/9341/9351/9361
8-bit microcontroller with accelerated two-clock 80C51 core
8.6 ADC operating modes
8.6.1 Fixed channel, single conversion mode
A single input channel can be selected for conversion. A single conversion will be
performed and the result placed in the result register pair which corresponds to the
selected input channel. An interrupt, if enabled, will be generated after the conversion
completes.
In P89LPC9351/9361, in fixed channel mode, the PGA channel selection is dependent on
the ADC channel selection. If PGA is enabled, all the selected channels for A/D
conversion will be amplified and the gain amplify level is the same.
8.6.2 Fixed channel, continuous conversion mode
A single input channel can be selected for continuous conversion. The results of the
conversions will be sequentially placed in the four result register. The user may select
whether an interrupt can be generated after every four conversions. Additional conversion
results will again cycle through the four result register, overwriting the previous results.
Continuous conversions continue until terminated by the user.
In P89LPC9351/9361, in fixed channel mode, the PGA channel selection is independent
and can be different to A/D conversion channel selection. If different, the gain of the
selected ADC channel is 1.
8.6.3 Auto scan, single conversion mode
Any combination of the four input channels can be selected for conversion. A single
conversion of each selected input will be performed and the result placed in the result
register which corresponds to the selected input channel. An interrupt, if enabled, will be
generated after all selected channels have been converted. If only a single channel is
selected this is equivalent to single channel, single conversion mode.
In P89LPC9351/9361, in auto scan mode, the PGA channel selection is dependent on the
ADC channel selection. If PGA is enabled, all the selected channel for A/D conversion will
be amplified and the gain amplify level is the same.
8.6.4 Auto scan, continuous conversion mode
Any combination of the four input channels can be selected for conversion. A conversion
of each selected input will be performed and the result placed in the result register which
corresponds to the selected input channel. An interrupt, if enabled, will be generated after
all selected channels have been converted. The process will repeat starting with the first
selected channel. Additional conversion results will again cycle through the eight result
register pairs, overwriting the previous results. Continuous conversions continue until
terminated by the user.
In P89LPC9351/9361, in auto scan mode, the PGA channel selection is dependent on the
ADC channel selection. If PGA is enabled, all the selected channel for A/D conversion will
be amplified and the gain amplify level is the same.
8.6.5 Dual channel, continuous conversion mode
This is a variation of the auto scan continuous conversion mode where conversion occurs
on two user-selectable inputs. The result of the conversion of the first channel is placed in
the result register, ADxDAT0. The result of the conversion of the second channel is placed
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