參數(shù)資料
型號： P89C61X2
廠商： NXP Semiconductors N.V.
元件分類： 8位微控制器
英文描述： 80C51 8-bit Flash microcontroller family
中文描述： 80C51的8位閃存微控制器系列
文件頁數(shù)： 44/56頁
文件大?。?/td> 342K
代理商： P89C61X2
Philips Semiconductors
Product data
P89C60X2/61X2
80C51 8-bit Flash microcontroller family
64KB Flash, 512B/1024B RAM
2003 Sep 11
44
ERAM
256 or 768 BYTES
UPPER
128 BYTES
INTERNAL RAM
LOWER
128 BYTES
INTERNAL RAM
SPECIAL
FUNCTION
REGISTER
100
FF
00
FF
00
80
80
EXTERNAL
DATA
MEMORY
FFFF
0000
SU01293
Figure 30. Internal and External Data Memory Address Space with EXTRAM = 0
HARDWARE WATCHDOG TIMER (ONE-TIME
ENABLED WITH RESET-OUT FOR
P89C51RA2/RB2/RC2/RD2xx)
The WDT is intended as a recovery method in situations where the
CPU may be subjected to software upset. The WDT consists of a
14-bit counter and the Watchdog Timer reset (WDTRST) SFR. The
WDT is disabled at reset. To enable the WDT, the user must write
01EH and 0E1H in sequence to the WDTRST, SFR location 0A6H.
When the WDT is enabled, it will increment every machine cycle
while the oscillator is running and there is no way to disable the
WDT except through reset (either hardware reset or WDT overflow
reset). When the WDT overflows, it will drive an output reset HIGH
pulse at the RST-pin (see the note below).
Using the WDT
To enable the WDT, the user must write 01EH and 0E1H in
sequence to the WDTRST, SFR location 0A6H. When the WDT is
enabled, the user needs to service it by writing 01EH and 0E1H to
WDTRST to avoid a WDT overflow. The 14-bit counter overflows
when it reaches 16383 (3FFFH) and this will reset the device. When
the WDT is enabled, it will increment every machine cycle while the
oscillator is running. This means the user must reset the WDT at
least every 16383 machine cycles. To reset the WDT, the user must
write 01EH and 0E1h to WDTRST. WDTRST is a write only register.
the WDT counter cannot be read or written. When the WDT
overflows, it will generate an output RESET pulse at the reset pin
(see note below). The RESET pulse duration is 98
mode; 196 in 12-clock mode), where T
OSC
= 1/f
OSC
. To make the
best use of the WDT, it should be serviced in those sections of code
that will periodically be executed within the time required to prevent
a WDT reset.
T
OSC
(6-clock
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
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