參數(shù)資料
型號: P87LPC768FN,112
廠商: NXP Semiconductors
文件頁數(shù): 14/65頁
文件大小: 0K
描述: IC 80C51 MCU 4K OTP 20-DIP
產(chǎn)品培訓(xùn)模塊: Migrating from 8/16-Bit MCUs to 32-Bit ARMs
標(biāo)準(zhǔn)包裝: 18
系列: LPC700
核心處理器: 8051
芯體尺寸: 8-位
速度: 20MHz
連通性: I²C,UART/USART
外圍設(shè)備: 欠壓檢測/復(fù)位,LED,POR,PWM,WDT
輸入/輸出數(shù): 18
程序存儲器容量: 4KB(4K x 8)
程序存儲器類型: OTP
RAM 容量: 128 x 8
電壓 - 電源 (Vcc/Vdd): 2.7 V ~ 6 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 4x8b
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 85°C
封裝/外殼: 20-DIP(0.300",7.62mm)
包裝: 管件
產(chǎn)品目錄頁面: 706 (CN2011-ZH PDF)
其它名稱: 568-3220-5
935267488112
P87LPC768FN
Philips Semiconductors
Preliminary data
P87LPC768
Low power, low price, low pin count (20 pin) microcontroller
with 4 kB OTP 8-bit A/D, Pulse Width Modulator
2002 Mar 12
19
Poll PWMCON0 to find that Transfer Bit PWMCON0.6 is “0”.
When “0”:
Write CNSW.(0:1) and CPSW.(0:4) for desired pulse widths and
counter reload values
Set PWMCON0 to Run and Transfer
Note that if a narrow pulse on the Brake Pin causes brake to be
asserted, it may not be possible to go through the above code
before the end of the pulse. In this case, in addition to the code
shown, an external latch on the Brake Pin may be required to
ensure that there is a smooth transition in going from brake to run.
The details for PWMCON1 are shown in the following table.
PWMCON1: PWM Control register 1
Addr: 0DBH
Reset Value: 00H
BIT
SYMBOL
FUNCTION
PWMCON1.7
BKCH
See table below
PWMCON1.6
BKPS
0= ”Brake” is asserted if P0.2(Brake Pin) is low.
1= ”Brake” is asserted if P0.2(Brake Pin) is high.
PWMCON1.5
BPEN
See table below.
PWMCON1.4
BKEN
0= ”Brake” is never asserted.
1= ”Brake” is enabled per table below.
PWMCON1.3
PWM3B
0= PWM3 is low, when Brake is asserted.
1= PWM3 is high, when Brake is asserted.
PWMCON1.2
PWM2B
0= PWM2 is low, when Brake is asserted.
1= PWM2 is high, when Brake is asserted.
PWMCON1.1
PWM1B
0= PWM1 is low, when Brake is asserted.
1= PWM1 is high, when Brake is asserted.
PWMCON1.0
PWM0B
0= PWM0 is low, when Brake is asserted.
1= PWM0 is high, when Brake is asserted.
7
6
54
32
10
BKCH
BKPS
BPEN
BKEN
PWM3B
PWM2B
PWM1B
PWM0B
SU01388
BPEN
0
1
BKCH
0
1
0
1
BRAKE CONDITION
Always On, (Software Brake)
On when PWM not running (Brake Pin has no effect)
On when Brake Pin asserted (PWM run has no effect)
Not Allowed
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