參數(shù)資料
型號: P87LPC767FN,112
廠商: NXP Semiconductors
文件頁數(shù): 20/61頁
文件大?。?/td> 0K
描述: IC 80C51 MCU 4K OTP 20-DIP
產(chǎn)品培訓(xùn)模塊: Migrating from 8/16-Bit MCUs to 32-Bit ARMs
標準包裝: 18
系列: LPC700
核心處理器: 8051
芯體尺寸: 8-位
速度: 20MHz
連通性: I²C,UART/USART
外圍設(shè)備: 欠壓檢測/復(fù)位,LED,POR,WDT
輸入/輸出數(shù): 18
程序存儲器容量: 4KB(4K x 8)
程序存儲器類型: OTP
RAM 容量: 128 x 8
電壓 - 電源 (Vcc/Vdd): 2.7 V ~ 6 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 4x8b
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 85°C
封裝/外殼: 20-DIP(0.300",7.62mm)
包裝: 管件
其它名稱: 568-3217-5
935267192112
P87LPC767FN
Philips Semiconductors
Product data
P87LPC767
Low power, low price, low pin count (20 pin)
microcontroller with 4-kbyte OTP and 8-bit A/D converter
2002 Mar 25
24
SU01163
KBF (KBI INTERRUPT)
EKB
(FROM IEN1 REGISTER)
P0.7
KBI.7
P0.6
KBI.6
P0.5
P0.4
P0.3
P0.2
P0.1
P0.0
KBI.5
KBI.4
KBI.3
KBI.2
KBI.1
KBI.0
Figure 16. Keyboard Interrupt
BIT
SYMBOL
FUNCTION
KBI.7
When set, enables P0.7 as a cause of a Keyboard Interrupt.
KBI.6
When set, enables P0.6 as a cause of a Keyboard Interrupt.
KBI.5
When set, enables P0.5 as a cause of a Keyboard Interrupt.
KBI.4
When set, enables P0.4 as a cause of a Keyboard Interrupt.
KBI.3
When set, enables P0.3 as a cause of a Keyboard Interrupt.
KBI.2
When set, enables P0.2 as a cause of a Keyboard Interrupt.
KBI.1
When set, enables P0.1 as a cause of a Keyboard Interrupt.
KBI.0
When set, enables P0.0 as a cause of a Keyboard Interrupt.
Note: the Keyboard Interrupt must be enabled in order for the settings of the KBI register to be effective. The interrupt flag
(KBF) is located at bit 7 of AUXR1.
KBI.0
SU01164
KBI.1
KBI.2
KBI.3
KBI.4
KBI.5
KBI.6
KBI.7
0
1
2
3
4
5
6
7
KBI
Reset Value: 00h
Not Bit Addressable
Address: 86h
Figure 17. Keyboard Interrupt Register (KBI)
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