參數(shù)資料
型號(hào): P87LPC762BD,512
廠商: NXP Semiconductors
文件頁數(shù): 3/14頁
文件大?。?/td> 0K
描述: IC 80C51 MCU 2K OTP 20-SOIC
產(chǎn)品培訓(xùn)模塊: Migrating from 8/16-Bit MCUs to 32-Bit ARMs
標(biāo)準(zhǔn)包裝: 38
系列: LPC700
核心處理器: 8051
芯體尺寸: 8-位
速度: 20MHz
連通性: I²C,UART/USART
外圍設(shè)備: 欠壓檢測(cè)/復(fù)位,LED,POR,WDT
輸入/輸出數(shù): 18
程序存儲(chǔ)器容量: 2KB(2K x 8)
程序存儲(chǔ)器類型: OTP
RAM 容量: 128 x 8
電壓 - 電源 (Vcc/Vdd): 2.7 V ~ 6 V
振蕩器型: 內(nèi)部
工作溫度: 0°C ~ 70°C
封裝/外殼: 20-SOIC(0.295",7.50mm 寬)
包裝: 管件
產(chǎn)品目錄頁面: 705 (CN2011-ZH PDF)
其它名稱: 568-1257-5
935264003512
P87LPC762BD
Philips Semiconductors
Preliminary data
87LPC762
Low power, low price, low pin count (20 pin)
microcontroller with 2 kbyte OTP
2001 Oct 26
8
Name
Reset
Value
Bit Functions and Addresses
MSB
LSB
SFR
Address
Description
TL1
Timer 1 low byte
8Bh
00h
TMOD
Timer 0 and 1 mode
89h
GATE
C/T
M1
M0
GATE
C/T
M1
M0
00h
WDCON#
Watchdog control register
A7h
WDOVF
WDRUN
WDCLK
WDS2
WDS1
WDS0
Note 4
WDRST#
Watchdog reset register
A6h
xxh
NOTES:
* SFRs are bit addressable.
# SFRs are modified from or added to the 80C51 SFRs.
1. Unimplemented bits in SFRs are X (unknown) at all times. Ones should not be written to these bits since they may be used for other
purposes in future derivatives. The reset value shown in the table for these bits is 0.
2. I/O port values at reset are determined by the PRHI bit in the UCFG1 configuration byte.
3. The PCON reset value is x x BOF POF–0 0 0 0b. The BOF and POF flags are not affected by reset. The POF flag is set by hardware upon
power up. The BOF flag is set by the occurrence of a brownout reset/interrupt and upon power up.
4. The WDCON reset value is xx11 0000b for a Watchdog reset, xx01 0000b for all other reset causes if the watchdog is enabled, and xx00
0000b for all other reset causes if the watchdog is disabled.
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