
Philips Semiconductors
Preliminary data
87LPC762
Low power, low price, low pin count (20 pin)
microcontroller with 2 kbyte OTP
2001 Oct 26
8
Name
Reset
Value
Bit Functions and Addresses
MSB
LSB
SFR
Address
Description
TL1
Timer 1 low byte
8Bh
00h
TMOD
Timer 0 and 1 mode
89h
GATE
C/T
M1
M0
GATE
C/T
M1
M0
00h
WDCON#
Watchdog control register
A7h
–
–
WDOVF
WDRUN
WDCLK
WDS2
WDS1
WDS0
Note 4
WDRST#
Watchdog reset register
A6h
xxh
NOTES:
* SFRs are bit addressable.
# SFRs are modified from or added to the 80C51 SFRs.
1. Unimplemented bits in SFRs are X (unknown) at all times. Ones should not be written to these bits since they may be used for other
purposes in future derivatives. The reset value shown in the table for these bits is 0.
2. I/O port values at reset are determined by the PRHI bit in the UCFG1 configuration byte.
3. The PCON reset value is x x BOF POF–0 0 0 0b. The BOF and POF flags are not affected by reset. The POF flag is set by hardware upon
power up. The BOF flag is set by the occurrence of a brownout reset/interrupt and upon power up.
4. The WDCON reset value is xx11 0000b for a Watchdog reset, xx01 0000b for all other reset causes if the watchdog is enabled, and xx00
0000b for all other reset causes if the watchdog is disabled.