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參數(shù)資料
| 型號： | P87C52UBPN,112 |
| 廠商： | NXP Semiconductors |
| 文件頁數(shù)： | 28/38頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC 80C51 MCU 256 RAM 40DIP |
| 產(chǎn)品培訓模塊： | Migrating from 8/16-Bit MCUs to 32-Bit ARMs |
| 標準包裝： | 9 |
| 系列： | 87C |
| 核心處理器： | 8051 |
| 芯體尺寸： | 8-位 |
| 速度： | 33MHz |
| 連通性： | EBI/EMI，UART/USART |
| 外圍設備： | POR |
| 輸入/輸出數(shù)： | 32 |
| 程序存儲器容量： | 8KB（8K x 8） |
| 程序存儲器類型： | OTP |
| RAM 容量： | 256 x 8 |
| 電壓 - 電源 (Vcc/Vdd)： | 4.5 V ~ 5.5 V |
| 振蕩器型： | 內部 |
| 工作溫度： | 0°C ~ 70°C |
| 封裝/外殼： | 40-DIP（0.600"，15.24mm） |
| 包裝： | 管件 |
| 其它名稱： | 935253730112 P87C52UBPN P87C52UBPN-ND |
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Philips Semiconductors
Product specification
80C51/87C51/80C52/87C52
80C51 8-bit microcontroller family
4 K/8 K OTP/ROM low voltage (2.7 V–5.5 V),
low power, high speed (33 MHz), 128/256 B RAM
2000 Aug 07
34
80C51 ROM CODE SUBMISSION
When submitting ROM code for the 80C51, the following must be specified:
1. 4k byte user ROM data
2. 64 byte ROM encryption key
3. ROM security bits.
ADDRESS
CONTENT
BIT(S)
COMMENT
0000H to 0FFFH
DATA
7:0
User ROM Data
1000H to 103FH
KEY
7:0
ROM Encryption Key
1040H
SEC
0
ROM Security Bit 1
1040H
SEC
1
ROM Security Bit 2
Security Bit 1:
When programmed, this bit has two effects on masked ROM parts:
1. External MOVC is disabled, and
2. EA is latched on Reset.
Security Bit 2:
When programmed, this bit inhibits Verify User ROM.
NOTE: Security Bit 2 cannot be enabled unless Security Bit 1 is enabled.
If the ROM Code file does not include the options, the following information must be included with the ROM code.
For each of the following, check the appropriate box, and send to Philips along with the code:
Security Bit #1:
V Enabled
V Disabled
Security Bit #2:
V Enabled
V Disabled
Encryption:
V No
V Yes
If Yes, must send key file.
80C52 ROM CODE SUBMISSION
When submitting ROM code for the 80C52, the following must be specified:
1. 8k byte user ROM data
2. 64 byte ROM encryption key
3. ROM security bits.
ADDRESS
CONTENT
BIT(S)
COMMENT
0000H to 1FFFH
DATA
7:0
User ROM Data
2000H to 203FH
KEY
7:0
ROM Encryption Key
2040H
SEC
0
ROM Security Bit 1
2040H
SEC
1
ROM Security Bit 2
Security Bit 1:
When programmed, this bit has two effects on masked ROM parts:
1. External MOVC is disabled, and
2. EA is latched on Reset.
Security Bit 2:
When programmed, this bit inhibits Verify User ROM.
NOTE: Security Bit 2 cannot be enabled unless Security Bit 1 is enabled.
If the ROM Code file does not include the options, the following information must be included with the ROM code.
For each of the following, check the appropriate box, and send to Philips along with the code:
Security Bit #1:
V Enabled
V Disabled
Security Bit #2:
V Enabled
V Disabled
Encryption:
V No
V Yes
If Yes, must send key file.
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| P87C52UFAA | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:80C51 8-bit microcontroller family 8K.64K/256.1K OTP/ROM/ROMless, low voltage 2.7V.5.5V, low power, high speed 33 MHz |
| P87C52UFAA-T | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:8-Bit Microcontroller |
| P87C52UFBB | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:80C51 8-bit microcontroller family 8K.64K/256.1K OTP/ROM/ROMless, low voltage 2.7V.5.5V, low power, high speed 33 MHz |
| P87C52UFPN | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:8-bit CMOS (low voltage, low power and high speed) microcontroller families |
| P87C52X2 | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:80C51 8-bit microcontroller family 4K/8K/16K/32K ROM/OTP 128B/256B RAM low voltage 2.7 to 5.5 V, low power, high speed 30/33 MHz |
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