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參數(shù)資料
| 型號(hào)： | P87C51SBAA,512 |
| 廠商： | NXP Semiconductors |
| 文件頁(yè)數(shù)： | 13/38頁(yè) |
| 文件大?。?/td> | 0K |
| 描述： | IC 80C51 MCU 4K OTP 44-PLCC |
| 產(chǎn)品培訓(xùn)模塊： | Migrating from 8/16-Bit MCUs to 32-Bit ARMs |
| 標(biāo)準(zhǔn)包裝： | 26 |
| 系列： | 87C |
| 核心處理器： | 8051 |
| 芯體尺寸： | 8-位 |
| 速度： | 16MHz |
| 連通性： | EBI/EMI，UART/USART |
| 外圍設(shè)備： | POR |
| 輸入/輸出數(shù)： | 32 |
| 程序存儲(chǔ)器容量： | 4KB（4K x 8） |
| 程序存儲(chǔ)器類型： | OTP |
| RAM 容量： | 128 x 8 |
| 電壓 - 電源 (Vcc/Vdd)： | 2.7 V ~ 5.5 V |
| 振蕩器型： | 內(nèi)部 |
| 工作溫度： | 0°C ~ 70°C |
| 封裝/外殼： | 44-LCC（J 形引線） |
| 包裝： | 管件 |
| 產(chǎn)品目錄頁(yè)面： | 705 (CN2011-ZH PDF) |
| 其它名稱： | 568-1246-5 935260182512 P87C51SBAA |
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Philips Semiconductors
Product specification
80C51/87C51/80C52/87C52
80C51 8-bit microcontroller family
4 K/8 K OTP/ROM low voltage (2.7 V–5.5 V),
low power, high speed (33 MHz), 128/256 B RAM
2000 Aug 07
20
Reduced EMI
All port pins of the 8xC51 and 8xC52 have slew rate controlled
outputs. This is to limit noise generated by quickly switching output
signals. The slew rate is factory set to approximately 10 ns rise and
fall times.
Reduced EMI Mode
The AO bit (AUXR.0) in the AUXR register when set disables the
ALE output.
AUXR (8EH)
7
6
54
32
1
0
–
AO
AUXR.0
AO
Turns off ALE output.
Dual DPTR
The dual DPTR structure (see Figure 13) enables a way to specify
the address of an external data memory location. There are two
16-bit DPTR registers that address the external memory, and a
single bit called DPS = AUXR1/bit0 that allows the program code to
switch between them.
New Register Name: AUXR1#
SFR Address: A2H
Reset Value: xxx000x0B
AUXR1 (A2H)
76
54
32
10
–
LPEP
WUPD
0
–
DPS
Where:
DPS = AUXR1/bit0 = Switches between DPTR0 and DPTR1.
Select Reg
DPS
DPTR0
0
DPTR1
1
The DPS bit status should be saved by software when switching
between DPTR0 and DPTR1.
Note that bit 2 is not writable and is always read as a zero. This
allows the DPS bit to be quickly toggled simply by executing an INC
DPTR instruction without affecting the WOPD or LPEP bits.
DPS
DPTR1
DPTR0
DPH
(83H)
DPL
(82H)
EXTERNAL
DATA
MEMORY
SU00745A
BIT0
AUXR1
Figure 13.
DPTR Instructions
The instructions that refer to DPTR refer to the data pointer that is
currently selected using the AUXR1/bit 0 register. The six
instructions that use the DPTR are as follows:
INC DPTR
Increments the data pointer by 1
MOV DPTR, #data16
Loads the DPTR with a 16-bit constant
MOV A, @ A+DPTR
Move code byte relative to DPTR to ACC
MOVX A, @ DPTR
Move external RAM (16-bit address) to
ACC
MOVX @ DPTR , A
Move ACC to external RAM (16-bit
address)
JMP @ A + DPTR
Jump indirect relative to DPTR
The data pointer can be accessed on a byte-by-byte basis by
specifying the low or high byte in an instruction which accesses the
SFRs. See application note AN458 for more details.
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相關(guān)代理商/技術(shù)參數(shù) |
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| P87C51SBAA-T | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:8-Bit Microcontroller |
| P87C51SBBB | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:80C51 8-bit microcontroller family 4K/128 OTP/ROM/ROMless low voltage 2.7V.5.5V, low power, high speed 33 MHz |
| P87C51SBBB,557 | 制造商:NXP Semiconductors 功能描述: |
| P87C51SBBB-S | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:8-Bit Microcontroller |
| P87C51SBPN | 制造商:NXP Semiconductors 功能描述:87C 16MHz 制造商:NXP Semiconductors 功能描述:IC 8BIT MCU OTP 4K 87C51 DIP40 制造商:NXP Semiconductors 功能描述:IC, 8BIT MCU OTP 4K, 87C51, DIP40 制造商:NXP Semiconductors 功能描述:IC, 8BIT MCU, 80C51, 16MHZ, DIP-40; Controller Family/Series:(8051) 8052; Core Size:8bit; No. of I/O's:32; Supply Voltage Min:2.7V; Supply Voltage Max:5.5V; Digital IC Case Style:DIP; No. of Pins:40; Program Memory Size:4KB ;RoHS Compliant: Yes 制造商:NXP Semiconductors 功能描述:MCU 8-bit P87 80C51 CISC 4KB EPROM 3.3V/5V 40-Pin PDIP |
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