80C51 8-bit microcontroller family 8KB/16KB/32KB/64K" />
參數(shù)資料
型號(hào): P87C51RA2BA,512
廠商: NXP Semiconductors
文件頁數(shù): 6/67頁
文件大?。?/td> 0K
描述: IC 80C51 MCU 512 RAM 44PLCC
產(chǎn)品培訓(xùn)模塊: Migrating from 8/16-Bit MCUs to 32-Bit ARMs
標(biāo)準(zhǔn)包裝: 26
系列: 87C
核心處理器: 8051
芯體尺寸: 8-位
速度: 33MHz
連通性: EBI/EMI,UART/USART
外圍設(shè)備: POR,PWM,WDT
輸入/輸出數(shù): 32
程序存儲(chǔ)器容量: 16KB(16K x 8)
程序存儲(chǔ)器類型: OTP
RAM 容量: 512 x 8
電壓 - 電源 (Vcc/Vdd): 2.7 V ~ 5.5 V
振蕩器型: 內(nèi)部
工作溫度: 0°C ~ 70°C
封裝/外殼: 44-LCC(J 形引線)
包裝: 管件
其它名稱: 568-7904-5
568-7904-5-ND
568-8355-5
935271889512
P87C51RA2BA
P87C51RA2BA,512-ND
P87C51RA2BA-ND
Philips Semiconductors
Product data
P87C51RA2/RB2/RC2/RD2
80C51 8-bit microcontroller family 8KB/16KB/32KB/64KB OTP
with 512B/1KB RAM, low voltage (2.7 to 5.5 V), low power, high
speed (30/33 MHz)
2003 Jan 24
14
INTn Pin
Timer n
Gate bit
TRn
TLn
(5 Bits)
THn
(8 Bits)
TFn
Interrupt
Control
C/T = 0
C/T = 1
SU01618
OSC
÷ d*
Tn Pin
*d = 6 in 6-clock mode; d = 12 in 12-clock mode.
Figure 3. Timer/Counter 0/1 Mode 0: 13-Bit Timer/Counter
IT0
BIT
SYMBOL
FUNCTION
TCON.7
TF1
Timer 1 overflow flag. Set by hardware on Timer/Counter overflow.
Cleared by hardware when processor vectors to interrupt routine, or clearing the bit in software.
TCON.6
TR1
Timer 1 Run control bit. Set/cleared by software to turn Timer/Counter on/off.
TCON.5
TF0
Timer 0 overflow flag. Set by hardware on Timer/Counter overflow.
Cleared by hardware when processor vectors to interrupt routine, or by clearing the bit in software.
TCON.4
TR0
Timer 0 Run control bit. Set/cleared by software to turn Timer/Counter on/off.
TCON.3
IE1
Interrupt 1 Edge flag. Set by hardware when external interrupt edge detected.
Cleared when interrupt processed.
TCON.2
IT1
Interrupt 1 type control bit. Set/cleared by software to specify falling edge/low level triggered
external interrupts.
TCON.1
IE0
Interrupt 0 Edge flag. Set by hardware when external interrupt edge detected.
Cleared when interrupt processed.
TCON.0
IT0
Interrupt 0 Type control bit. Set/cleared by software to specify falling edge/low level
triggered external interrupts.
SU01516
IE0
IT1
IE1
TR0
TF0
TR1
TF1
Bit Addressable
TCON
Address = 88H
Reset Value = 00H
76
54
321
0
Figure 4. Timer/Counter 0/1 Control (TCON) Register
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