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參數(shù)資料
| 型號： | P83C566BDA |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | Microcontrollers for PAL/SECAM TV with OSD and VST(帶 OSD和 VST的在PAL/SECAM TV中應(yīng)用的微控制器) |
| 中文描述： | 8-BIT, MROM, 12 MHz, MICROCONTROLLER, PQCC68 |
| 封裝： | PLASTIC, MO-047AC, SOT-188-2, LCC-68 |
| 文件頁數(shù)： | 32/80頁 |
| 文件大?。?/td> | 266K |
| 代理商： | P83C566BDA |
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1999 Jun 11
32
Philips Semiconductors
Product specification
Microcontrollers for NTSC TVs with On-Screen
Display (OSD) and Closed Caption (CC)
P8xCx70 family
16 AFT INPUTS (ADC)
The P8xCx70 has 3 ADC channels each with 4-bit resolution. One channel is intended to measure the level of the key
pad signals. This is achieved by comparing the AFT signal with the output of a 4-bit DAC.
The compare time of the AFT is not greater than 8
μ
s at 12 MHz. Adding NOP instructions is recommended in between
the instructions which change the reference voltage or channel and the instructions which read the AFTC register bit.
Ensure that pins 9, 10 and 11 are configured as AFT functions before use (see Chapter 14).
The conversion time (T
AFC
) of an AFT (4-bit output) is calculated as shown below.
where:
T
AFC
T
CPU
8
+
(
)
4
μ
s
×
=
T
CPU
number of instructions to program 4-bit DAC
(
)
instruction cycle time
(
)
×
=
Fig.11 AFT block diagram.
handbook, full pagewidth
4-BIT DAC
COMPARATOR
AFTL3
AFTL2
AFTL1
AFTL0
AFTH0
AFTH1
AFT2E
AFT1E
AFT0E
MGL596
AFT
CHANNEL
SELECTOR
P1.2/AFT2
P1.1/AFT1
P1.0/AFT0
Vref
EN
DERIVATIVE PORT
SELECTOR
EN1
EN2
AFTC
Internal bus
Internal bus
Channel selection
(SFR address EAH)
EN0
AFT function enable
(SFR address F4H)
(SFR address EAH)
(SFR address EAH)
3
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