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參數(shù)資料
| 型號(hào)： | P83C366CBP |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | Microcontrollers for PAL/SECAM TV with OSD and VST(帶 OSD和 VST的在PAL/SECAM TV中應(yīng)用的微控制器) |
| 中文描述： | 8-BIT, MROM, 12 MHz, MICROCONTROLLER, PDIP42 |
| 封裝： | 0.600 INCH, PLASTIC, SDIP-42 |
| 文件頁(yè)數(shù)： | 27/92頁(yè) |
| 文件大?。?/td> | 382K |
| 代理商： | P83C366CBP |
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1999 Mar 10
27
Philips Semiconductors
Product specification
Microcontrollers for PAL/SECAM TV
with OSD and VST
P8xCx66 family
11.8
Interrupt Polarity Register (IX1)
Writing a logic 1 to bits IL9, IL6, IL5, IL4, IL3 and IL2 will set the polarity level of the corresponding external interrupt to
be active HIGH. Writing a logic 0 to these bits will set the corresponding external interrupt to be active LOW.
External interrupts INT1 and INT0 however can be programmed to be edge sensitive. Writing a logic 1 to bits IL8 and IL7
will activate the external interrupts INT1 and INT0 on a rising edge (LOW-to-HIGH). Writing a logic 0 to bits IL8 and IL7
will activate the external interrupts INT1 and INT0 on a falling edge (HIGH-to-LOW). This feature is useful for pulse width
measurement; see Section 11.8.1.
Table 29
Interrupt Polarity Register (SFR address E9H)
Table 30
Description of IX1 bits
11.8.1
P
ULSE WIDTH MEASUREMENT EXAMPLE
To determine the LOW time of a signal on the external interrupt pin INT0 the following sequence should be followed.
1.
External interrupt 0 must be programmed to edge sensitivity (SFR TCON, address 88H).
2.
IL7 must be programmed as shown in Fig.12.
3.
The value held in Timer 0 or Timer 1 represents the pulse width of the signal on the INT0 pin.
7
6
5
4
3
2
1
0
IL9
IL8
IL7
IL6
IL5
IL4
IL3
IL2
BIT
SYMBOL
DESCRIPTION
7
6
5
4
3
2
1
0
IL9
IL8
IL7
IL6
IL5
IL4
IL3
IL2
external interrupt 9 polarity level (P1.7 port line)
external interrupt 1 polarity level (INT1) polarity level
external interrupt 0 polarity level (INT0) polarity level
external interrupt 6 polarity level (P1.4 port line)
external interrupt 5 polarity level (P1.3 port line)
external interrupt 4 polarity level (P1.2 port line)
external interrupt 3 polarity level (P1.1 port line)
external interrupt 2 polarity level (P1.0 port line)
Fig.12 Pulse width measurement timing diagram.
handbook, full pagewidth
INT0
IL7
INT0(CPU)
Start interrupt service
routine to start counting
system clock periods
with Timer 0 or Timer 1
Start interrupt service
routine to stop counting
of Timer 0 or Timer 1
MGL295
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