參數(shù)資料
型號: P4C116-15L32M
廠商: PYRAMID SEMICONDUCTOR CORP
元件分類: DRAM
英文描述: ULTRA HIGH SPEED 2K x 8 STATIC CMOS RAMS
中文描述: 2K X 8 STANDARD SRAM, 15 ns, QCC32
封裝: 0.450 X 0.550 INCH, LCC-32
文件頁數(shù): 3/14頁
文件大小: 251K
代理商: P4C116-15L32M
P4C116/P4C116L
Page 3 of 14
Document #
SRAM110
REV A
AC ELECTRICAL CHARACTERISTICS—READ CYCLE
(V
CC
= 5V ± 10%, All Temperature Ranges)
(2)
Sym.
t
RC
t
AA
t
AC
t
OH
t
LZ
t
HZ
t
OE
t
OLZ
t
OHZ
t
PU
t
PD
Parameter
Output Enable Low to Data Valid
Chip Enable to Power Up Time
Chip Disable to Power Down
Read Cycle Time
Address Access Time
Chip Enable Access Time
Output Hold from Address Change
Chip Enable to Output in Low Z
Chip Disable to Output in High Z
Output Enable Low to Low Z
Output Enable High to High Z
–10
Min Max
–12
Min Max
–15
Min Max
–20
Min Max
–25
Min Max
–35
Min Max
Unit
15
15
15
2
2
7
10
0
8
0
15
20
2
2
0
0
20
20
8
10
9
20
25
2
3
0
0
25
25
10
15
12
20
35
2
3
0
0
35
35
15
20
15
25
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
10
2
2
0
0
10
10
5
6
10
12
2
2
0
0
12
12
6
8
12
*V
CC
= 5.5V. Tested with outputs open. f = Max. Switching inputs are 0V and 3V.
CE
= V
IL
,
OE
= V
IH
.
I
CC
Symbol
Parameter
Temperature
Range
Commercial
Military
Dynamic Operating Current*
–10
180
N/A
–12
170
–20
155
–25
150
–35
140
Unit
mA
mA
POWER DISSIPATION CHARACTERISTICS VS. SPEED
N/A
170
160
155
150
160
–15
6
7
DATA RETENTION CHARACTERISTICS (P4C116L Military Temperature Only)
Symbol
V
DR
I
CCDR
t
CDR
t
R
Parameter
V
CC
for Data Retention
Data Retention Current
Chip Deselect to
Data Retention Time
Operation Recovery Time
Test Conditons
CE
V
CC
–0.2V,
V
IN
V
CC
–0.2V
or V
IN
0.2V
Min
2.0
0
t
RC
§
Typ.*
V
=
2.0V 3.0V
Max
V
=
2.0V 3.0V
Unit
10
15
600
900
V
μA
ns
ns
*T
A
= +25°C
§t
RC
= Read Cycle Time
This parameter is guaranteed but not tested.
DATA RETENTION WAVEFORM
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參數(shù)描述
P4C116-15L32MB 制造商:PYRAMID 制造商全稱:Pyramid Semiconductor Corporation 功能描述:ULTRA HIGH SPEED 2K x 8 STATIC CMOS RAMS
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