參數(shù)資料
型號: P4C1049-55L36C
廠商: Pyramid Semiconductor Corporation
英文描述: HIGH SPEED 512K x 8 STATIC CMOS RAM
中文描述: 高速為512k × 8靜態(tài)CMOS存儲器
文件頁數(shù): 4/12頁
文件大?。?/td> 222K
代理商: P4C1049-55L36C
P4C1049
Page 4 of 12
Document #
SRAM128
REV OR
AC ELECTRICAL CHARACTERISTICS—READ CYCLE
(V
CC
= 5V ± 10%, All Temperature Ranges)
(2)
Sym.
t
RC
t
AA
t
AC
t
OH
t
LZ
t
HZ
t
OE
t
OLZ
t
OHZ
t
PU
t
PD
Parameter
Read Cycle Time
Address Access Time
Chip Enable Access Time
Output Hold from Address
Change
Chip Enable to Output in
Low Z
Chip Disable to Output in
High Z
Output Enable Low to Low Z
Output Enable High to High Z
Chip Enable to Power Up
Time
Chip Disable to Power Down
Time
Output Enable Low to Data
Valid
Min
Max
Min
Max
Min
Max
Min
Max
Min
Max
Min
Max
Min
Max
-20
-25
-35
-45
-55
-70
-15
Unit
15
3
3
0
0
15
15
8
7
7
15
20
3
3
0
0
20
20
9
9
9
20
25
3
3
0
0
25
25
11
10
10
25
35
3
3
0
0
35
35
15
15
15
35
45
3
3
0
0
45
45
20
20
20
45
55
3
3
0
0
55
55
25
25
25
55
70
3
3
0
0
70
70
30
30
30
70
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
TIMING WAVEFORM OF READ CYCLE NO. 1 (
OE
CONTROLLED)
(5)
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