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參數(shù)資料
| 型號： | P2042AG-08TT |
| 廠商： | ALLIANCE SEMICONDUCTOR CORP |
| 元件分類： | 時鐘及定時 |
| 英文描述： | LCD Panel EMI Reduction IC |
| 中文描述： | 2042 SERIES, PLL BASED CLOCK DRIVER, 1 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO8 |
| 封裝： | GREEN, TSSOP-8 |
| 文件頁數(shù)： | 2/8頁 |
| 文件大小： | 353K |
| 代理商： | P2042AG-08TT |
August 2005
rev 1.3
Pin Configuration
Pin Description
P2042A
Notice: The information in this document is subject to change without notice.
LCD Panel EMI Reduction IC
2 of 8
CP0
1
2
3
4
5
6
7
8
P2042A
CLKIN
CP1
VSS
SSON#
ModOUT
SR0
VDD
Pin#
Pin
Name
CLKIN
Type
Description
1
I
External reference frequency input. Connect to externally generated reference signal.
Digital logic input used to select charge pump current. This pin has an internal pull-up
resistor.
Refer Modulation Selection Table.
Digital logic input used to select charge pump current. This pin has an internal pull-up
resistor.
Refer Modulation Selection Table.
Ground to entire chip. Connect to system ground.
Digital logic input used to enable Spread Spectrum function (Active LOW). Spread
Spectrum function enabled when LOW, disabled when HIGH.
This pin has an internal pull-low resistor.
Spread spectrum clock output.
2
CP0
I
3
CP1
I
4
VSS
P
5
SSON#
I
6
ModOUT
O
7
SR0
I
Digital logic input used to select Spreading Range. This pin has an internal pull-up resistor.
8
VDD
P
Power supply for the entire chip
Modulation Selection
Spreading Range (±%)
54MHz
65MHz
CP0
CP1
SR0
32.5MHz
81MHz
108MHz
Modulation Rate
(KHz)
0
0
0
0.56
1.05
1.00
0.98
0.80
0
0
1
1.94
1.68
1.56
1.48
1.22
0
1
0
1.36
1.05
1.00
0.92
0.67
0
1
1
1.92
1.68
1.56
1.48
1.06
1
0
0
1.24
0.81
0.66
0.40
0.27
1
0
1
1.91
1.29
1.02
0.74
0.43
1
1
0
0.91
0.45
0.34
0.05
0.15
1
1
1
1.47
0.71
0.54
0.36
0.21
(FIN /40) * 62.49
KHz
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