參數(shù)資料
型號： ORSO82G5-3F680C
廠商： Lattice Semiconductor Corporation
文件頁數(shù)： 5/153頁
文件大小： 0K
描述： IC FPSC TRANSCEIVER 8CH 680-BGA
產(chǎn)品變化通告： Product Discontinuation 01/Aug/2011
標(biāo)準(zhǔn)包裝： 24
系列： *
Lattice Semiconductor
ORCA ORSO42G5 and ORSO82G5 Data Sheet
102
30A03
[0]
NO_TX_RDI_EXSEQ
00
Not Transmission of RDI, If
NO_TX_RDI_EXSEQ = 1, a transmit link will
not send data if its corresponding receive link is
not good due to excessive sequence errors. If
this bit is set to 0, a transmit link will still send
data even if its corresponding receive link has
excessive sequence errors. This bit should
always be set during simulation and in SONET
mode.
Both
[1]
AUTO_BUNDLE
Automatic (Link) Bundle, AUTO_BUNDLE = 1
allows a link within a link group to remain active
even when another link within that group is
defective. Cell data from all links within that
group will continue to be sent to the FPGA. If
this bit is set to 0, then all links within a link
group must be good before cell data are read
from the links by the IPC and passed to the
FPGA.
Cell
[2]
RSVD
Reserved
—
[3]
REJOIN_A
Link Rejoin, REJOIN = 1 forces any link in a
SERDES block to reassert a “RX link good” sig-
nal automatically when three consecutive
sequence numbers are correct on that link.
Cell
[4]
AUTO_REMOVE_A
Automatic (Link) Remove, AUTO_REMOVE = 1
indicates that any link in a SERDES block which
sees three excessive sequence errors should
deassert the “RX link good” signal which will
cause the link to be inactive.
Cell
[5]
RSVD
Reserved
—
[6]
REJOIN_B
Link Rejoin, REJOIN = 1 forces any link in a
SERDES block to reassert a “RX link good” sig-
nal automatically when three consecutive
sequence numbers are correct on that link.
Cell
[7]
AUTO_REMOVE_B
AUTO_REMOVE_B = 1 indicates that any link in
SERDES block B which sees three excessive
sequence errors should deassert the “RX link
good” signal which will cause the link to be inac-
tive.
Cell
Table 36. Common Control Register Descriptions – ORSO82G5 (Continued)
(0x)
Absolute
Address
Bit
Name
Reset
Value
(0x)
Description
Mode
相關(guān)PDF資料
PDF描述
ORT82G5-3F680C IC FPSC TRANSCEIVER 8CH 680-BGA
ORT8850L-1BMN680I IC TRANCEIVERS FPSC 680FPGAM
ORT8850L-3BM680C IC FPSC TRANSCEIVER 8CH 680-BGA
P1010PSE5HFA MPU PROTO 800/667 425-TEPBGA1
P1013NXN2LFB IC MPU 1067MHZ 689TEPBGA
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
ORSO82G5-3FN680C 功能描述:FPGA - 現(xiàn)場可編程門陣列 ORCA FPSC 1.5V 2.7 G b Bpln Xcvr 643K Gt RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數(shù)量: 邏輯塊數(shù)量:943 內(nèi)嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數(shù)量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-256
ORSO82G5-3FN680C1 功能描述:FPGA - 現(xiàn)場可編程門陣列 10368 LUT 372 I/O RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數(shù)量: 邏輯塊數(shù)量:943 內(nèi)嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數(shù)量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-256
ORSO82G5-G2-PAC-EV 功能描述:可編程邏輯 IC 開發(fā)工具 ORCA ORSO82G5-FPSC Eval Brd RoHS:否 制造商:Altera Corporation 產(chǎn)品:Development Kits 類型:FPGA 工具用于評估:5CEFA7F3 接口類型: 工作電源電壓:
ORSPI4 制造商:LATTICE 制造商全稱:Lattice Semiconductor 功能描述:Dual SPI4 Interface and High-Speed SERDES FPSC
ORSPI4-1F1156C 功能描述:FPGA - 現(xiàn)場可編程門陣列 16192 LUT RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數(shù)量: 邏輯塊數(shù)量:943 內(nèi)嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數(shù)量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-256
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。

采購需求

(若只采購一條型號，填寫一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進(jìn)入我的后臺，查看報價

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進(jìn)入我的后臺，查看報價

*型號 *數(shù)量 廠商 批號 封裝
添加更多采購

我的聯(lián)系方式

*
*
*