Data Sheet
June 1999
ORCA Series 2 FPGAs
Lucent Technologies Inc.
111
N24
M26
L25
M24
L26
M23
K25
L24
K26
K23
J25
K24
J26
H25
H26
J24
G25
H23
G26
H24
F25
G23
F26
G24
E25
E26
F24
D25
E23
D26
E24
C25
D24
C26
A25
B24
A24
B23
C23
PR7A
PR7B
PR7C
PR7D
PR6A
PR6B
PR6C
PR6D
PR5A
PR5B
PR5C
PR5D
PR4A
PR4B
PR4C
PR4D
PR3A
PR3B
—
PR3C
PR3D
—
—
—
PR2A
PR2B
—
PR2C
PR2D
PR1A
PR1B
PR1C
PR1D
RD_CFGN
PT16D
PT16C
—
PT16B
PT16A
PR8A
PR8B
PR8C
PR8D
PR7A
PR7B
PR7C
PR7D
PR6A
PR6B
PR6C
PR6D
PR5A
PR5B
PR5C
PR5D
PR4A
PR4B
PR4C
PR4D
PR3A
PR3B
PR3C
PR3D
PR2A
PR2B
—
PR2C
PR2D
PR1A
PR1B
PR1C
PR1D
RD_CFGN
PT18D
PT18C
—
PT18B
PT18A
PR9A
PR9B
PR9C
PR9D
PR8A
PR8B
PR8C
PR8D
PR7A
PR7B
PR7C
PR7D
PR6A
PR6B
PR6C
PR6D
PR5A
PR5B
PR5C
PR5D
PR4A
PR4B
PR4C
PR4D
PR3A
PR3B
PR3D
PR2A
PR2D
PR1A
PR1B
PR1C
PR1D
RD_CFGN
PT20D
PT20C
PT20B
PT20A
PT19D
PR11A
PR11D
PR10A
PR10D
PR9A
PR9D
PR8A
PR8D
PR7A
PR7B
PR7C
PR7D
PR6A
PR6B
PR6C
PR6D
PR5A
PR5B
PR5C
PR5D
PR4A
PR4B
PR4C
PR4D
PR3A
PR3B
PR3D
PR2A
PR2D
PR1A
PR1B
PR1C
PR1D
RD_CFGN
PT24D
PT24C
PT24B
PT24A
PT23D
V
DD
5
PR14D
PR13A
PR13D
PR12A
PR12D
PR11A
PR11D
PR10A
PR10B
PR10C
PR10D
PR9A
PR9B
PR9C
PR9D
PR8A
PR7A
PR7C
PR6A
V
DD
5
PR5B
PR5C
PR5D
PR4A
PR4B
PR4D
PR3A
PR3D
PR2A
PR2D
PR1A
PR1D
RD_CFGN
PT30D
PT30A
PT29B
PT29A
PT28D
I/O-V
DD
5
I/O
I/O
I/O
I/O-CS1
I/O
I/O
I/O
I/O-
CS0
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O-
RD
I/O
I/O
I/O
I/O-V
DD
5
I/O
I/O
I/O
I/O-
WR
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
RD_CFGN
I/O
I/O
I/O
I/O
I/O
Pin Information
(continued)
Table 27. OR2C/2T10A, OR2C/2T12A, OR2C/2T15A/B, OR2C/2T26A, and OR2T40A/B 352-Pin PBGA
Pinout
(continued)
Pin
2C/2T10A Pad
2C/2T12A Pad
2C/2T15A/B Pad
2C/2T26A Pad OR2T40A/B Pad
Function
Notes:
The pins labeled I/O-V
DD
5 are user I/Os for the OR2CxxA and OR2TxxB series, but they are connected to V
DD
5 for the OR2TxxA series.
The pins labeled V
SS
-ETC are the 6 x 6 array of thermal balls located at the center of the package. The balls can be attached to the ground plane
of the board for enhanced thermal capability (see Table 29), or they can be left unconnected.