參數(shù)資料
型號(hào)： OP249GSZ-REEL7
廠商： ANALOG DEVICES INC
元件分類： 運(yùn)算放大器
英文描述： Dual, Precision JFET High Speed Operational Amplifier; Package: SOIC; No of Pins: 8; Temperature Range: Industrial
中文描述： DUAL OP-AMP, 3600 uV OFFSET-MAX, 4.7 MHz BAND WIDTH, PDSO8
封裝： ROHS COMPLIANT, MS-012AA, SOIC-8
文件頁(yè)數(shù)： 6/20頁(yè)
文件大?。?/td> 464K
代理商： OP249GSZ-REEL7
OP249
Rev. G | Page 14 of 20
10
0%
100
90
50mV
1s
00
29
6-
0
42
Figure 42. Small-Signal Transient Response,
AV = 1, ZL = 2 kΩ||100 pF, No Compensation, VS = ±15 V
As with most JFET input amplifiers, the output of the OP249
can undergo phase inversion if either input exceeds the specified
input voltage range. Phase inversion does not damage the
amplifier, nor does it cause an internal latch-up condition.
Supply decoupling should be used to overcome inductance and
resistance associated with supply lines to the amplifier. A 0.1 μF
and a 10 μF capacitor should be placed between each supply pin
and ground.
OPEN-LOOP GAIN LINEARITY
The OP249 has both an extremely high open-loop gain of
1 kV/mV minimum and constant gain linearity, which enhances its
dc precision and provides superb accuracy in high closed-loop
gain applications. Figure 43 illustrates the typical open-loop
gain linearity—high gain accuracy is assured, even when
driving a 600 Ω load.
OFFSET VOLTAGE ADJUSTMENT
The inherent low offset voltage of the OP249 makes offset
adjustments unnecessary in most applications. However, where
a lower offset error is required, balancing can be performed
with simple external circuitry, as shown in Figure 44 and Figure 45.
HORIZONTAL 5V/DIV
OUTPUT CHARGE
VERTICAL 50V/DIV
INPUT VARIATION
002
96
-04
3
Figure 43. Open-Loop Gain Linearity; Variation in Open-Loop Gain Results in
Errors in High Closed-Loop Gain Circuits; RL = 600 Ω, VS = ±15 V
+V
R3
R4
R2
R1
VOS ADJUST RANGE = ±V
VOUT
VIN
–V
1/2
OP249
R2
31
R5
50k
R1
200k
00
29
6-
0
44
Figure 44. Offset Adjustment for Inverting Amplifier Configuration
+V
R5
VOS ADJUST RANGE = ±V
R2
R1
1 + R5
R4
IF R2 << R4
R5
R4 + R2
R4
VOUT
–V
VIN
R3
50k
R2
33
R1
200k
1/2
OP249
GAIN =
= 1 +
VOUT
VIN
=
0
029
6-
0
45
Figure 45. Offset Adjustment for Noninverting Amplifier Configuration
In Figure 44, the offset adjustment is made by supplying a small
voltage at the noninverting input of the amplifier. Resistors R1
and R2 attenuate the potentiometer voltage, providing a ±2.5 mV
(with VS = ±15 V) adjustment range, referred to the input.
Figure 45 shows the offset adjustment for the noninverting
amplifier configuration, also providing a ±2.5 mV adjustment
range. As shown in the equations in Figure 45, if R4 is not much
greater than R2, a resulting closed-loop gain error must be
accounted for.
SETTLING TIME
The settling time is the time between when the input signal begins
to change and when the output permanently enters a prescribed
error band. The error bands on the output are 5 mV and 0.5 mV,
respectively, for 0.1% and 0.01% accuracy.
Figure 46 shows the settling time of the OP249, which is typically
870 ns. Moreover, problems in settling response, such as thermal
tails and long-term ringing, are nonexistent.
10
0%
100
90
500ns
10mV
870ns
00
29
6-
0
46
Figure 46. Settling Characteristics of the OP249 to 0.01%
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