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參數(shù)資料
| 型號： | OMC507 |
| 廠商： | Electronic Theatre Controls, Inc. |
| 英文描述： | FULL-FEATURED CIRCUIT BOARD ASSEMBLY FOR DIRECT DRIVE OF 3-PHASE BRUSHLESS DC MOTORS |
| 中文描述： | 全功能電路板裝配直接驅(qū)動3相無刷直流電動機 |
| 文件頁數(shù)： | 2/8頁 |
| 文件大小： | 118K |
| 代理商： | OMC507 |
COMMUTATION TRUTH TABLE
This table shows the Phase Output state versus
the state of the Hall-Effect and Direction Inputs.
Please note that the Hall-Effect Inputs are
Grey-encoded; that is, only one input is allowed
to change from one input state to another at a
time.
The commutation coding shown reflects Hall-
Effect sensors that are spaced at 120
mechanical increments. Also, internal
protection logic disables all three Phase
Outputs when the Hall-Effect Inputs are set to
an illegal condition (i.e. all logic low or all logic
high).
DIGITAL INPUTS
PHASE OUTPUTS
Dir
1
1
1
1
1
1
0
0
0
0
0
0
X
X
H1
0
0
0
1
1
1
1
1
1
0
0
0
0
1
H2
0
1
1
1
0
0
0
0
1
1
1
0
0
1
H3
1
1
0
0
0
1
1
0
0
0
1
1
0
1
A
B
C
Hi-Z
Sink
Sink
Hi-Z
Source
Source
Sink
Sink
Hi-Z
Source
Source
Hi-Z
Hi-Z
Hi-Z
Sink
Hi-Z
Source
Source
Hi-Z
Sink
Source
Hi-Z
Sink
Sink
Hi-Z
Source
Hi-Z
Hi-Z
Source
Source
Hi-Z
Sink
Sink
Hi-Z
Hi-Z
Source
Source
Hi-Z
Sink
Sink
Hi-Z
Hi-Z
2.1 - 2
SIMPLIFIED BLOCK DIAGRAM
OMC507
Vcc (1)
Ground (2)
Command (5)
+5V
+5V_Hall (6)
Hall_A (8)
Hall_B (9)
Hall_C (10)
Direction (11)
Enable (12)
Tach_Out (13)
V_Motor
Phase_A
Phase_B
Phase_C
Monitor (14)
Vcc
VREF
VREF
Tach_Out
Vcc
Bus
Bus
Bus
Bus
VREF
U1
UC3625
25
15
1
27
26
28
2
8
9
10
6
21
22
23
1
1
24
18
16
17
12
13
14
4
5
7
3
20
RC_OSC
GND
E/A_IN(+)
E/A_OUT
PWM_IN
E/A_IN(-)
VREF
H1
H2
H3
DIR
RC_BRAKE
QUAD_SEL
OV_COAST
V
P
SSTART
PUA
PUC
PUB
PDC
PDB
PDA
ISENSE_1
ISENSE_2
SPEED_IN
ISENSE
TACH_OUT
R_Sense
C_Bus
10uF
R/C
Compensation
R/C
Voltage
Enable
Circuit
Level
Level
Level
Filter
Offset
Set/Adjust
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