1
Features
16-bit Fixed-point Digital Signal Processing (DSP) Core
Low-power Consumption:
– ATC35/ATL35 - 2 mW/MIPS at 3.3V
– ATC25/ATL25 - 1 mW/MIPS at 2.5V
– ATC20/ATL20 - 0.6 mW/MIPS at 1.8V
High Performance:
– ATC35/ATL35 - 52 MIPS, 104 MHz at 3.0V/85
°
C (worst case)
– ATC25/ATL25 - 70 MIPS, 140 MHz at 2.25V/85
°
C (worst case)
– ATC20/ATL20 - 65 MIPS, 130 MHz at 1.6V/85
°
C (worst case)
Small Die Size:
– ATC35/ATL35 - 2.5 mm
2
– ATC25/ATL25 - 1.3 mm
2
– ATC20/ATL20 - 1.3 mm
2
Slow Mode and Stop Mode allow Further Power Reduction
Wide Range of Operating Voltage: 1.8V - 3.6V
High Level of Modularity:
– Expandable Data and Program RAM and/or ROM
– User-definable Registers
64K x 16-bit Data Address Space, 64K x 16-bit Program Address Space
Three Parallel Execution Units
Wait States are Supported to Link with Slow External Devices
Advanced Windows-based Development Tools: Macro Assembler, Linker,
C Compiler, Debugger (emulator, simulator)
Optional ‘On-core Emulator’ Allows the On-core Debugger, Embedded in
the ASIC, to be Run
JTAG Serial Interface for On-chip Debug (optional)
Description
Atmel’s embedded OakDSPCore
is a 16-bit general-purpose low-power, low-voltage
and high-speed digital signal processor (DSP). It is designed for mid-to-high-end tele-
communications and consumer electronics applications, where low power and
portability are major requirements. Among the applications supported are digital cellu-
lar telephones, fast modems, advanced facsimile machines and hard disk drives.
OakDSPCore is available as a DSP core in Atmel’s standard cell library, to be utilized
as an engine for DSP-based ASICs. It is specified with several levels of modularity in
RAM, ROM and I/O blocks, allowing efficient DSP-based ASIC development.
OakDSPCore is aimed at achieving the best cost-performance factor for a given
(small) silicon area. As a key element of a system-on-chip, it takes into account such
requirements as program size, data memory size, glue logic, power management, etc.
The OakDSPCore consists of three main execution units operating in parallel: the
Computation/Bit Manipulation Unit (CBU), the Data Address Arithmetic Unit (DAAU)
and the Program Control Unit (PCU). The core also contains ROM and RAM address-
ing units, and Program Control Logic (PCL). All other peripheral blocks, which are
application specific, are defined as a part of the user-specific logic, implemented
around the DSP core on the same silicon die.
OakDSPCore has an enhanced set of DSP and general microprocessor functions to
meet the application requirements. The OakDSPCore programming model and
instruction set are aimed at straightforward generation of efficient and compact code.
Embedded
Digital Signal
Processing
Core
OakDSPCore
Rev. 0876E–03/00