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參數(shù)資料
| 型號(hào)： | NMF3010FCT1G |
| 廠商： | ON Semiconductor |
| 文件頁(yè)數(shù)： | 1/10頁(yè) |
| 文件大小： | 0K |
| 描述： | IC LINE FILTER SIGNAL 6FLIPCHIP |
| 標(biāo)準(zhǔn)包裝： | 3,000 |
| 濾波器類型： | 低通 |
| 濾波器數(shù)： | 2 |
| 電源電壓： | 0 V ~ 10 V |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 6-WFBGA，F(xiàn)CBGA |
| 供應(yīng)商設(shè)備封裝： | 6-覆晶（1.5x1） |
| 包裝： | 帶卷 (TR) |
| 其它名稱： | NMF3010FCT1GOSTR |
Semiconductor Components Industries, LLC, 2004
March, 2004 Rev. 1
1
Publication Order Number:
NMF3000/D
NMF3000, NMF3010
DualStage, Differential
Lines Filter with ESD
Protection
The NMF3000 and the NMF3010 are a dualstage, differential line
ESD and filtering protection scheme for input signals into portable
devices. The NMF3000 is the first stage and is located at or very near
to the interface to the outside world. It provides the highlevel ESD
protection as well as the initial filtering of incoming audio signals. The
NMF3010 is the second stage and provides additional signal filtering.
This second stage can be placed some distance away from the first
stage to allow for effective filtering across extended distances.
Features
Dual Filtering Lines for 2Channels or Differential Transmission
Separate Power and Analog Grounds for ESD Protection and
Filtering Circuitry
V
CC Input Pin on First Stage to Set Microphone DC Bias
IEC 6100042 Grade ±15 kV Contact ESD Protection on the Inputs,
VCC, and Between Power and Analog Grounds
IEC 6100042 Level 1 ESD protection on All Other PintoPin
Combinations
These are PbFree Devices*
NMF3000FCT1G
NMF3010FCT1G
1st
Stage
2nd
Stage
C
Incoming
Audio
Signals
Audio
Amplifier
Microphone
Figure 1. System Diagram
VCC
*For additional information on our PbFree strategy and soldering details, please
download the ON Semiconductor Soldering and Mounting Techniques
Reference Manual, SOLDERRM/D.
NMF
3000
ALYW
A1
http://onsemi.com
6 Bump FlipChip
CASE 499AF
9 Bump FlipChip
CASE 499AE
MARKING
DIAGRAMS
See detailed ordering and shipping information in the package
dimensions section on page 8 of this data sheet.
ORDERING INFORMATION
A1
NIO
ALYW
A1
A
= Assembly Location
L
= Wafer Lot
Y
= Year
W
= Work Week
A1
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