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參數(shù)資料
| 型號： | NCS36000DG |
| 廠商： | ON Semiconductor |
| 文件頁數(shù)： | 5/8頁 |
| 文件大小： | 0K |
| 描述： | IC PIR DETECTOR CTLR 14SOIC |
| 標(biāo)準(zhǔn)包裝： | 55 |
| 類型： | 檢測器控制器 |
| 輸入類型： | 數(shù)字 |
| 輸出類型： | 數(shù)字 |
| 接口： | CMOS |
| 電流 - 電源： | 50µA |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 14-SOIC（0.154"，3.90mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 14-SOICN |
| 包裝： | 托盤 |
NCS36000
http://onsemi.com
5
4
+
5
3
+
2
1
G
D
VREF
LDO
6
Sensor dependent
components
Vm
VREF 6
Vm
Vh
Vl
Application dependent
components
+
Vl
Vh
OP2_O
+
Comp_P
Comp_N
Figure 5. Figure Showing Simplified Block Diagram of Analog Conditioning Stages
Digital Signal Processing Block (all times assume a
62.5 Hz system oscillator frequency)
The digital signaling processing block performs three
major functions.
The first function is that the device toggles LED during the
startup sequencing at approximately two hertz regardless
of the state of the XLED_EN pin. The startup sequence lasts
for thirty seconds. During that time the OUT pin is held low
regardless of the state of OP2_O.
The second function of the digital signal processing block
is to insure a certain glitch width is seen before OUT is
toggled. The digital signal processing block is synchronous
with the system oscillator frequency and therefore the
deglitch time is related to when the comparators toggle
within the oscillator period. A signal width less than two
clock period is guaranteed to be deglitched as a zero. A
signal width of greater than three clock cycles is guaranteed
to be deglitched. It should be noted that downsampling
can occur if sufficient antialiasing is not performed at the
input of the circuit (OPI_P) or if noise is injected into the
amplifiers, an example would be a noisy power supply.
The third function of the digital signal processing block is
to recognize different pulse signatures coming from the
window comparator block. The device is equipped with two
pulse recognition routines. Single pulse mode (MODE tied
to VSS) will trigger the OUT pin if either comparator toggles
and the deglitch time is of the appropriate length. (See
two pulses with each pulse coming from the opposite
comparator to occur within a timeout window of five
seconds (See Figure 7). If the adjacent pulses occur outside
the timeout window then the digital processing block will
restart the pulse recognition routine (Figure 8).
xLED_EN Pin
The xLED_EN pin enables the LED output driver when
motion has been detected. If xLED_EN is tied high the LED
pin will not toggle after motion is detected. If the xLED_EN
is tied low the LED pin will toggle when motion is detected.
During start-up the LED pin will toggle irrespective of how
the xLED_EN pin is tied. (See Figure 6).
OSC
LED
Startup Sequencing
COMP_P
OUT
COMP_N
<32m Sec
>48m Sec
~1.6 Sec
If xLED_EN = 0
MODE
OP2_O
Figure 6. Timing Diagram for SinglePulse Mode Detection
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| NCS36000DRG | 功能描述:LED照明驅(qū)動器 PIR ASSP RoHS:否 制造商:STMicroelectronics 輸入電壓:11.5 V to 23 V 工作頻率: 最大電源電流:1.7 mA 輸出電流: 最大工作溫度: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:SO-16N |
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