參數(shù)資料
型號: NCN8024DTBR2G
廠商: ON Semiconductor
文件頁數(shù): 4/16頁
文件大?。?/td> 0K
描述: SMART CARD IC 5V/3V TSSOP
標(biāo)準(zhǔn)包裝: 2,500
應(yīng)用: 智能卡讀取器,寫入器
電源電壓: 5V
封裝/外殼: 28-TSSOP(0.173",4.40mm 寬)
供應(yīng)商設(shè)備封裝: 28-TSSOP
包裝: 帶卷 (TR)
安裝類型: 表面貼裝
NCN8024
http://onsemi.com
12
The clock can also be applied to the card using a RSTIN
mode allowing controlling the clock starting by setting
RSTIN Low (Figure 4). Before running the activation
sequence, that is before setting Low CMDVCC RSTIN is set
High. In these initial conditions CRD_CLK starts when
RSTIN is pulled Low. This allows a precise count of clock
pulses before toggling CRD_RST High for ATR
(Answer To Reset) request.
The internal activation sequence activates the different
channels according to a specific hardware builtit sequencing
internally defined but at the end the actual activation
sequencing is the responsibility of the application software
and can be redefined by the microcontroller to comply with
the different standards and the different ways the standards
manage this activation (for example light differences exist
between the EMV and the ISO7816 standards).
Figure 4. Activation Sequence RSTIN mode (RSTIN Starting High)
CRD_RST
CRD_VCC
CRD_IO
CRD_CLK
CMDVCC
ATR
RSTIN
t0
t1 t2
Figure 5. Activation Sequence Normal Mode
CRD_RST
CRD_VCC
CRD_IO
CRD_CLK
CMDVCC
ATR
RSTIN
t0
t1 t2 t3
tact
t4
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