參數(shù)資料
型號: NCN6001DTBR2G
廠商: ON Semiconductor
文件頁數(shù): 8/36頁
文件大小: 0K
描述: IC INTERFACE SMART CARD 20TSSOP
標(biāo)準(zhǔn)包裝: 1
應(yīng)用: 智能卡
接口: 微控制器
電源電壓: 2.75 V ~ 5.5 V
封裝/外殼: 20-TSSOP(0.173",4.40mm 寬)
供應(yīng)商設(shè)備封裝: 20-TSSOP
包裝: 標(biāo)準(zhǔn)包裝
安裝類型: 表面貼裝
其它名稱: NCN6001DTBR2GOSDKR
NCN6001
http://onsemi.com
16
POWER DOWN SEQUENCE
The NCN6001 provides an automatic Power Down
sequence, according to the ISO78163 specifications, and
the communication session terminates immediately. The
sequence is launched when the card is extracted, or when the
CRD_VCC voltage is overloaded as described by the
ISO/CEI 78163 sequence depicted hereafter:
ISO78163 sequence:
"Force RST to Low
"Force CLK to Low, unless it is already in this state
"Force C4 & C8 to Low
"Force CRD_IO to Low
"Shut Off the CRD_VCC supply
Since the internal digital filter is activated for any card
insertion or extraction, the physical power sequence will be
activated 50
ms (typical) after the card has been extracted. Of
course, such a delay does not exist when the MPU
intentionally launches the power down. Figure 7 shows the
oscillogram captured in the NCN6001 demo board.
The internal active pull down NMOS connected across
CRD_VCC and GND discharges the external reservoir
capacitor in 100
ms (typical), assuming Cout = 10 mF.
Figure 7. Typical Power Down Sequence
Typical delay between each signal is 500 ns
The internal active pull down NMOS connected across CRD_VCC and GND discharges the external reservoir capacitor in
100
ms (typical), assuming Cout = 10 mF.
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