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參數(shù)資料
| 型號(hào)： | NCN4557MTR2G |
| 廠商： | ON Semiconductor |
| 文件頁(yè)數(shù)： | 9/12頁(yè) |
| 文件大?。?/td> | 0K |
| 描述： | IC SMART CARD/SIM DUAL 16-QFN |
| 標(biāo)準(zhǔn)包裝： | 3,000 |
| 系列： | * |
| 應(yīng)用： | * |
| 接口： | * |
| 電源電壓： | * |
| 封裝/外殼： | 16-WFQFN 裸露焊盤 |
| 供應(yīng)商設(shè)備封裝： | 16-QFN（3x3） |
| 包裝： | 帶卷 (TR) |
| 安裝類型： | 表面貼裝 |
NCN4557
http://onsemi.com
6
POWER SUPPLY SECTION (40
°C to +85°C)
Pin
Symbol
Rating
Min
Typ
Max
Unit
3
VBAT
Power Supply
2.7
5.5
V
3
IVBAT
Operating current
CRD_VCCA = 3.0 V, CRD_VCCB = 0 V, ICCA & B = 0 mA
CRD_VCCA = 1.8 V, CRD_VCCB = 0 V, ICCA & B = 0 mA
CRD_VCCA = 0 V, CRD_VCCB = 3.0 V, ICCA & B = 0 mA
CRD_VCCA = 0 V, CRD_VCCB = 1.8 V, ICCA & B = 0 mA
26
25
26
25
80
mA
3
IVBAT_SD
Shutdown current – ENABLE = Low
3
mA
2
VDD
Operating Voltage
1.8
5.5
V
2
IVDD
Operating Current (CLK & RST Low)
0.1
2
mA
2
IVDD_SD
Shutdown Current – ENABLE = Low
0.05
1
mA
2
VDD
Undervoltage Lockout
0.6
1.5
V
1,4
CRD_VCCA or B
3.0 V Mode, VBAT = 3.3 V to 5.5 V, ICRD_VCC = 0 mA to 50 mA
1.8 V Mode, VBAT = 2.7 V to 5.5 V, ICRD_VCC = 0 mA to 50 mA
2.75
1.65
3.0
1.8
3.25
1.95
V
1,4
ICRD_VCC_SC
Short –Circuit Current – CRD_VCC Shorted to GND, TA = 25°C
50
175
mA
7,13,14
Channel Turnon Time
ICCA or B = 0 mA, ENABLE rise edge to CRD_I/OA or B rise edge
0.8
2.5
ms
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared operating
temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit values are
applied individually under normal operating conditions and not valid simultaneously.
DIGITAL INPUT/OUTPUT SECTION CLK, RST, I/O, ENABLE, SEL0, SEL1 (40
°C to + 85°C)
Pin
Symbol
Rating
Min
Typ
Max
Unit
9,10
VIH
VIL
High Level Input Voltage (RST, CLK)
Low Level Input Voltage (RST, CLK)
0.85 * VDD
VDD
0.15 * VDD
V
11,12,13
VIH
VIL
High Level Input Voltage (ENABLE, SEL0, SEL1)
Low Level Input Voltage (ENABLE, SEL0, SEL1)
0.85 * VDD
VDD
0.15 * VDD
V
9,10,11,
12,13
IIH, IIL
Input current (RST, CLK, ENABLE, SEL0, SEL1)
1
mA
8
VOH_I/O
VOL_I/O
High Level Output Voltage (CRD_ I/O = CRD_VCC, IOH_I/O=20 mA)
Low Level Output Voltage (CRD_ I/O = 0 V, IOL_I/O = 500 mA)
0.75 * VDD
VDD
0.3
V
8
tR, tF
Rise and Fall times (I/O), Cout = 30 pF
0.8
ms
8
Rpu_I/O
I/0 Pullup Resistor
12
18
24
k
W
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared operating
temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit values are
applied individually under normal operating conditions and not valid simultaneously.
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