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參數(shù)資料
| 型號(hào)： | NB7VQ1006MMNTXG |
| 廠商： | ON Semiconductor |
| 文件頁數(shù)： | 4/10頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC EQUALIZER RECEIVER 24-QFN |
| 標(biāo)準(zhǔn)包裝： | 3,000 |
| 邏輯類型： | 均衡器接收器 |
| 電源電壓： | 1.71 V ~ 2.625 V |
| 位數(shù)： | 1 |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 24-VFQFN 裸露焊盤 |
| 供應(yīng)商設(shè)備封裝： | 24-QFN（4x4） |
| 包裝： | 帶卷 (TR) |
NB7VQ1006M
http://onsemi.com
3
Table 2. PIN DESCRIPTION
Pin
Name
I/O
Description
1
VCC
Positive Supply Voltage for the Core Logic
2
IN
LVPECL, CML,
LVDS Input
Noninverted Differential Clock/Data Input. (Note 1)
3
IN
LVPECL, CML,
LVDS Input
Inverted Differential Clock/Data Input. (Note 1)
4
VT
Internal 50 W Termination Pin for IN and IN
5
EQEN
LVCMOS Input
Equalizer Enable Input; pin will default LOW when left open (has internal pulldown resistor)
6
VCC
Positive Supply Voltage for the Core Logic
7
GND
Negative Supply Voltage
8
Q5
CML
Inverted Differential Output. Typically terminated with 50 W resistor to VCC.
9
Q5
CML
Noninverted Differential Output. Typically terminated with 50 W resistor to VCC.
10
Q4
CML
Inverted Differential Output. Typically terminated with 50 W resistor to VCC.
11
Q4
CML
Noninverted Differential Output. Typically terminated with 50 W resistor to VCC.
12
GND
Negative Supply Voltage
13
VCCO
Positive Supply Voltage for the preamplifier and output buffer
14
Q3
CML
Inverted Differential Output. Typically terminated with 50 W resistor to VCC.
15
Q3
CML
Noninverted Differential Output. Typically terminated with 50 W resistor to VCC.
16
Q2
CML
Inverted Differential Output. Typically terminated with 50 W resistor to VCC.
17
Q2
CML
Noninverted Differential Output. Typically terminated with 50 W resistor to VCC.
18
VCCO
Positive Supply Voltage for the preamplifier and output buffer
19
GND
Negative Supply Voltage
20
Q1
CML
Inverted Differential Output. Typically terminated with 50 W resistor to VCC.
21
Q1
CML
Noninverted Differential Output. Typically terminated with 50 W resistor to VCC.
22
Q0
CML
Inverted Differential Output. Typically terminated with 50 W resistor to VCC.
23
Q0
CML
Noninverted Differential Output. Typically terminated with 50 W resistor to VCC.
24
GND
Negative Supply Voltage
EP
The Exposed Pad (EP) on the QFN24 package bottom is thermally connected to the die for im-
proved heat transfer out of package. The exposed pad must be attached to a heatsinking con-
duit. The pad is electrically connected to GND and is recommended to be electrically connected
to GND on the PC board.
1. In the differential configuration when the input termination pin (VT) is connected to a common termination voltage or left open, and if no signal
is applied on IN/IN, then the device will be susceptible to selfoscillation.
2. All VCC, VCCO and GND pins must be externally connected to the same power supply voltage to guarantee proper device operation.
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