Table 6. AC CHARACTERISTICS VCC = 2." />
參數(shù)資料
型號: NB6L72MMNG
廠商: ON Semiconductor
文件頁數(shù): 7/10頁
文件大?。?/td> 0K
描述: IC CROSSPOINT SWITCH 2X2 16QFN
標準包裝: 123
功能: 交叉點開關(guān)
電路: 1 x 2:2
電壓電源: 單電源
電壓 - 電源,單路/雙路(±): 2.3 V ~ 3.6 V
電流 - 電源: 80mA
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 16-VFQFN 裸露焊盤
供應商設(shè)備封裝: 16-QFN(3x3)
包裝: 管件
NB6L72M
http://onsemi.com
6
Table 6. AC CHARACTERISTICS VCC = 2.375 V to 3.63 V, GND = 0 V, or VCC = 0 V, GND = -2.375 V to -3.63 V,
TA = -40°C to +85°C; (Note 10)
Symbol
Characteristic
Min
Typ
Max
Unit
VOUTPP
Output Voltage Amplitude (@ VINPPmin)fin ≤ 3 GHz
(Note 15) (See Figure 15)
250
380
mV
fDATA
Maximum Operating Data Rate
3
Gb/s
tPLH,
tPHL
Propagation Delay (@0.5GHz)
Dn to Qn
SELn to Qn
230
360
480
ps
tSKEW
Duty Cycle Skew (Note 11)
Within Device Skew
Device to Device Skew (Note 12)
6.0
20
25
85
ps
tDC
Output Clock Duty Cycle
fin ≤ 3.0 GHz
(Reference Duty Cycle = 50%)
40
50
60
%
tJITTER
RMS Random Clock Jitter (Note 13)
fin ≤ 3.0 GHz
Peak-to-Peak Data Dependent Jitter
fDATA = 2.5 Gb/s
(Note 14)
fDATA = 3.0 Gb/s
0.2
5.0
8.0
0.5
15
25
ps
VINPP
Input Voltage Swing/Sensitivity
(Differential Configuration) (Note 15)
150
2800
mV
tr, tf
Output Rise/Fall Times @ 0.5 GHz, (20% - 80%),
Q, Q
65
120
ps
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
10. Measured by forcing VINPP (minimum) from a 50% duty cycle clock source. All loading with an external RL = 50 W to VCC. Input edge rates
40 ps (20% - 80%).
11. Duty cycle skew is measured between differential outputs using the deviations of the sum of Tpw- and Tpw+ @ 0.5GHz.
12. Device to device skew is measured between outputs under identical transition @ 0.5 GHz.
13. Additive RMS jitter with 50% duty cycle clock signal.
14. Additive peak-to-peak data dependent jitter with input NRZ data at PRBS23.
15. Input and output voltage swing is a single-ended measurement operating in differential mode.
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