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參數(shù)資料
| 型號(hào)： | NB6L295MMNG |
| 廠商： | ON Semiconductor |
| 文件頁數(shù)： | 11/13頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC DELAY LINE 511TAP 24-QFN |
| 標(biāo)準(zhǔn)包裝： | 92 |
| 標(biāo)片/步級(jí)數(shù)： | 512 |
| 功能： | 多重，可編程 |
| 延遲到第一抽頭： | 3.2ns，6.2ns |
| 接頭增量： | 11ps |
| 可用的總延遲： | 3.2ns ~ 8.5ns，6.2ns ~ 16.6ns |
| 獨(dú)立延遲數(shù)： | 2 |
| 電源電壓： | 2.375 V ~ 3.6 V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 24-VFQFN 裸露焊盤 |
| 供應(yīng)商設(shè)備封裝： | 24-QFN（4x4） |
| 包裝： | 管件 |
| 其它名稱： | NB6L295MMNG-ND NB6L295MMNGOS |
NB6L295M
http://onsemi.com
7
Serial Data Interface Programming
The NB6L295M is programmed by loading the 11Bit SHIFT REGISTER using the SCLK, SDATA and SLOAD inputs.
The 11 SDATA bits are 1 PSEL bit, 1 MSEL bit and 9 delay value data bitsD[8:0]. A separate 11bit load cycle is required to
program the delay data value of each channel, PD0 and PD1. For example, at powerup two load cycles will be needed to initially
set PD0 and PD1; Dual Mode Operation as shown in Figures 3 and 4 and Extended Mode Operation as shown in Figures 5
and 6.
DUAL MODE OPERATIONS
PD0 Programmable Delay
Control
Bits
Value
PD1 Programmable Delay
Control
Bits
Value
0/1
0
0/1
0
1
D8
D7
D6
D5
D4
D3
D2
D1
D0
MSEL PSEL Bit
Name
D8
D7
D6
D5
D4
D3
D2
D1
D0
MSEL PSEL Bit
Name
(MSB)
(LSB)
Name
(MSB)
(LSB)
Name
Figure 3. PDO Shift Register
Figure 4. PD1 Shift Register
EXTENDED MODE OPERATIONS
PD0 Programmable Delay
Control
Bits
Value
PD1 Programmable Delay
Control
Bits
Value
0/1
1
0
0/1
1
D8
D7
D6
D5
D4
D3
D2
D1
D0
MSEL PSEL Bit
Name
D8
D7
D6
D5
D4
D3
D2
D1
D0
MSEL PSEL Bit
Name
(MSB)
(LSB)
Name
(MSB)
(LSB)
Name
Figure 5. PDO Shift Register
Figure 6. PD1 Shift Register
Refer to Table 6, Channel and Mode Select BIT Functions. In a load cycle, the 11Bit Shift Register least significant bit
(clocked in first) is PSEL and will determine which channel delay buffer, either PDO (LOW) or PD1 (HIGH), will latch the
delay data value D[8:0]. The MSEL BIT determines the Delay Mode. When set LOW, the Dual Delay Mode is selected and
the device uses both channels independently. A pulse edge entering IN0/IN0 is delayed according to the values in PD0 and exits
from Q0/Q0. An input signal pulse edge entering IN1/IN1 is delayed according to the values in PD1 and exits from Q1/Q1.
When MSEL is set HIGH, the Extended Delay Mode is selected and an input signal pulse edge enters IN0 and IN0 and flows
through PD0 and is extended through PD1 to exit at Q1 and Q1. The most significant 9bits, D[8:0] are delay value data for
both channels. See Figure 7.
Table 6. CHANNEL AND MODE SELECT BIT FUNCTIONS
BIT Name
Function
PSEL
0 Loads Data to PD0
1 Loads Data to PD1
MSEL
0 Selects Dual Programmable Delay Paths, 3.1 ns to 8.8 ns Delay Range for Each Path
1 Selects Extended Delay Path from IN0/IN0 to Q1/Q1, 6.0 ns to 17.2 ns Delay Range; Disables Q0/Q0 Outputs,
Q0LOW, Q0HIGH.
D[8:0]
Select one of 512 Delay Values
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|---|---|
| NB6L295MMNGEVB | 功能描述:電源管理IC開發(fā)工具 EVAL BOARD RoHS:否 制造商:Maxim Integrated 產(chǎn)品:Evaluation Kits 類型:Battery Management 工具用于評(píng)估:MAX17710GB 輸入電壓: 輸出電壓:1.8 V |
| NB6L295MMNTXG | 功能描述:延遲線/計(jì)時(shí)元素 CML DUAL PROG DELAY RoHS:否 制造商:Micrel 功能:Active Programmable Delay Line 傳播延遲時(shí)間:1000 ps 工作溫度范圍: 封裝 / 箱體:QFN-24 封裝:Tube |
| NB6L295MNG | 功能描述:延遲線/計(jì)時(shí)元素 LVPECL DUAL PRG DLAY RoHS:否 制造商:Micrel 功能:Active Programmable Delay Line 傳播延遲時(shí)間:1000 ps 工作溫度范圍: 封裝 / 箱體:QFN-24 封裝:Tube |
| NB6L295MNGEVB | 功能描述:電源管理IC開發(fā)工具 NB6L295 EVAL BOARD RoHS:否 制造商:Maxim Integrated 產(chǎn)品:Evaluation Kits 類型:Battery Management 工具用于評(píng)估:MAX17710GB 輸入電壓: 輸出電壓:1.8 V |
| NB6L295MNTXG | 功能描述:延遲線/計(jì)時(shí)元素 LVPECL DUAL PRG DLAY RoHS:否 制造商:Micrel 功能:Active Programmable Delay Line 傳播延遲時(shí)間:1000 ps 工作溫度范圍: 封裝 / 箱體:QFN-24 封裝:Tube |
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