參數(shù)資料
型號: MXL1543BCAI
廠商: MAXIM INTEGRATED PRODUCTS INC
元件分類: 通用總線功能
英文描述: +5V Multiprotocol, 3Tx/3Rx, Software- Selectable Clock/Data Transceivers
中文描述: TRIPLE LINE TRANSCEIVER, PDSO28
封裝: 5.30 MM, MO-150, SSOP-28
文件頁數(shù): 9/18頁
文件大?。?/td> 712K
代理商: MXL1543BCAI
Detailed Description
The MXL1543B is a three-driver/three-receiver, multipro-
tocol transceiver that operates from a single +5V supply.
The MXL1543B, along with the MXL1544/MAX3175 and
MXL1344A, form a complete software-selectable DTE or
DCE interface port that supports the V.28 (RS-232),
V.10/V.11 (RS-449/V.36, EIA-530, EIA-530A, X.21), and
V.35 protocols. The MXL1543B transceivers carry the
high-speed clock and data signals, while the
MXL1544/MAX3175 transceivers carry serial interface
control signaling. The MXL1543B can be terminated by
the MXL1344A software-selectable resistor termination
network or by a discrete termination network. The
MXL1543B features a 0.5μA no-cable mode, true fail-safe
operation, and thermal shutdown circuitry. Thermal shut-
down protects the drivers against excessive power dissi-
pation. When activated, the thermal shutdown circuitry
places the driver outputs into a high-impedance state.
Mode Selection
The state of the mode-select pins M0, M1, and M2
determines which serial interface protocol is selected
(Table 1). The state of the DCE/
DTE
input determines
whether the transceiver will be configured as a DTE or
DCE serial port. When the DCE/
DTE
input is logic
HIGH, driver T3 is activated and receiver R1 is dis-
abled. When the DCE/
DTE
input is logic LOW, driver T3
is disabled and receiver R1 is activated. M0, M1, M2,
M
+5V Multiprotocol, 3Tx/3Rx, Software-
Selectable Clock/Data Transceivers
_______________________________________________________________________________________
9
Pin Description
PIN
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
NAME
C1-
C1+
V
DD
V
CC
T1IN
T2IN
T3IN
R1OUT
R2OUT
R3OUT
M0
M1
M2
DCE/
DTE
R3INB
R3INA
R2INB
R2INA
T3OUTB/R1INB
T3OUTA/R1INA
T2OUTB
T2OUTA
T1OUTB
T1OUTA
GND
V
EE
C2-
C2+
FUNCTION
Capacitor C1 Negative Terminal. Connect a 1
μ
F ceramic capacitor between C1+ and C1-.
Capacitor C1 Positive Terminal. Connect a 1
μ
F ceramic capacitor between C1+ and C1-.
Generated Positive Supply. Connect a 4.7
μ
F ceramic capacitor to ground.
+5V Supply Voltage (
±
5%). Decouple with a 1
μ
F capacitor to ground.
Transmitter 1 TTL-Compatible Input
Transmitter 2 TTL-Compatible Input
Transmitter 3 TTL-Compatible Input
Receiver 1 CMOS Output
Receiver 2 CMOS Output
Receiver 3 CMOS Output
Mode-Select Pin with Internal Pullup to V
CC
Mode-Select Pin with Internal Pullup to V
CC
Mode-Select Pin with Internal Pullup to V
CC
DCE/DTE Mode-Select Pin with Internal Pullup to V
CC
Noninverting Receiver Input
Inverting Receiver Input
Noninverting Receiver Input
Inverting Receiver Input
Noninverting Transmitter Output/Noninverting Receiver Input
Inverting Transmitter Output/Inverting Receiver Input
Noninverting Transmitter Output
Inverting Transmitter Output
Noninverting Transmitter Output
Inverting Transmitter Output
Ground
Generated Negative Supply. Connect a 4.7
μ
F ceramic capacitor to ground.
Capacitor C2 Negative Terminal. Connect a 1
μ
F ceramic capacitor between C2+ and C2-.
Capacitor C2 Positive Terminal. Connect a 1
μ
F ceramic capacitor between C2+ and C2-.
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