參數(shù)資料
型號(hào): MX98742
英文描述: FEBC 100 Base Fast Ethernet Bridge Controller
中文描述: FEBC 100基地快速以太網(wǎng)橋控制器
文件頁數(shù): 10/36頁
文件大?。?/td> 166K
代理商: MX98742
10
MX98745
P/N:PM0427
REV. 1.4, JUL. 8, 1998
F. LED Display (Continued)
PAD #
88
Name
LED7/
PHY4
I/O
I/O,
TTL
Description
LED 7/Physical Address 4. Value on LED7 will be latched at the rising edge of
RESETL as the physical address 4 of MX98745. If EECONF is set, Physical
address will be overwritten by the value from EEPROM.
After EEPROM operation is completed, this pin will display port 7's Receivee/
Link, Partition, Isolation status and indicates 80+% Network utilization and 20+%
collision rate according to the value on LDS[2:0].
EEPROM Chip Select. Output by MX98745 when EECONF is set and EEPROM
operation is activated by MX98745.
Monitor. Value on this pin will be latched at the rising edge of RESETL. When
programmed to high, internal state machines's states will be outputed to this
pin serially for debugging usage. For normal operation, left unconnected.
72
EECS
O,
CMOS
I/O,
TTL
89
MON
G. Power/Ground Pins
PAD #
1,14,
17,55,
58,69,
77,81,
97,106,
121,127,
133,147,
160
23,29,
41,73,
80,103,
112,120,
136,
Name
GND
I/O
Description
Ground.
VDD
5V Power Supply.
Table 5-1 Pin Description for XRC II (Continued)
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