![](http://datasheet.mmic.net.cn/150000/MTB60N05HDT4_datasheet_5010391/MTB60N05HDT4_1.png)
Semiconductor Components Industries, LLC, 2000
November, 2000 – Rev.2
1
Publication Order Number:
MTB60N05HDL/D
MTB60N05HDL
Preferred Device
Power MOSFET
60 Amps, 50 Volts, Logic Level
N–Channel D2PAK
The D2PAK package has the capability of housing a larger die than
any existing surface mount package which allows it to be used in
applications that require the use of surface mount components with
higher power and lower RDS(on) capabilities. This advanced high–cell
density HDTMOS power FET is designed to withstand high energy in
the avalanche and commutation modes. This new energy efficient
design also offers a drain–to–source diode with a fast recovery time.
Designed for low voltage, high speed switching applications in power
supplies, converters and PWM motor controls, these devices are
particularly well suited for bridge circuits where diode speed and
commutating safe operating areas are critical and offer additional
safety margin against unexpected voltage transients.
Avalanche Energy Specified
Source–to–Drain Diode Recovery Time Comparable to a
Discrete Fast Recovery Diode
Diode is Characterized for Use in Bridge Circuits
IDSS and VDS(on) Specified at Elevated Temperature
Short Heatsink Tab Manufactured – Not Sheared
Specially Designed Leadframe for Maximum Power Dissipation
MAXIMUM RATINGS (TC = 25°C unless otherwise noted)
Rating
Symbol
Value
Unit
Drain–to–Source Voltage
VDSS
50
Vdc
Drain–to–Gate Voltage (RGS = 1.0 M)
VDGR
50
Vdc
Gate–to–Source Voltage
– Continuous
– Non–Repetitive (tp ≤ 10 ms)
VGS
VGSM
± 15
± 20
Vdc
Vpk
Drain Current – Continuous
Drain Current – Continuous @ 100
°C
Drain Current – Single Pulse (tp ≤ 10 s)
ID
IDM
60
42
180
Adc
Apk
Total Power Dissipation
Derate above 25
°C
PD
150
1.0
Watts
W/
°C
Operating and Storage Temperature Range
TJ, Tstg
– 55 to
175
°C
Single Pulse Drain–to–Source Avalanche
Energy – Starting TJ = 25°C
(VDD = 25 Vdc, VGS = 10 Vdc, Peak
IL = 60 Apk, L = 0.3 mH, RG = 25 )
EAS
540
mJ
Thermal Resistance – Junction to Case
Thermal Resistance – Junction to Ambient
R
θJC
R
θJA
1.0
62.5
°C/W
Maximum Lead Temperature for Soldering
Purposes, 1/8
″ from Case for 5 seconds
TL
260
°C
MARKING DIAGRAM
& PIN ASSIGNMENT
T60N05HDL
YWW
1
Gate
4
Drain
2
Drain
3
Source
60 AMPERES
50 VOLTS
RDS(on) = 14 m
Device
Package
Shipping
ORDERING INFORMATION
MTB60N05HD
D2PAK
50 Units/Rail
D2PAK
CASE 418B
STYLE 2
1
2
3
4
http://onsemi.com
N–Channel
D
S
G
T60N05HDL
= Device Code
Y
= Year
WW
= Work Week
MTB60N05HDT4
D2PAK
800/Tape & Reel
Preferred devices are recommended choices for future use
and best overall value.