參數(shù)資料
型號: MT93L04A
廠商: Zarlink Semiconductor Inc.
英文描述: 128-Channel Voice Echo Canceller
中文描述: 128頻道語音回聲消除器
文件頁數(shù): 11/56頁
文件大小: 903K
代理商: MT93L04A
MT93L04
Data Sheet
11
Zarlink Semiconductor Inc.
Sout_d2
Signal
L1
Send PCM Signal Output (Output).
Port 1 TDM
data output streams.Sout pin outputs serial TDM
data streams at 2.048 Mb/s with 32 channels per
stream.
Rout_d2
Signal
N4
Receive PCM Signal Output (Output).
Port 2
TDM data output streams. Rout pin outputs serial
TDM data streams at 2.048 Mb/s with 32 channels
per stream.
Sin_d2
Signal
L2
Send PCM Signal Input (Input).
Port 2 TDM data
input streams.
Sin pin receives serial TDM data streams at 2.048
Mb/s with 32 channels per stream.
Rin_d2
Signal
N3
Receive PCM Signal Input (Input).
Port 1 TDM
data input streams.Rin pin receives serial TDM
data streams at 2.048 Mb/s with 32 channels per
stream.
FOIb_d2
Signal
N2
Frame Pulse (Input).
This input accepts and
automatically identifies frame synchronization
signals formatted according to ST-BUS or GCI
interface specifications.
C4IB_d2
Signal
L3
Serial Clock (Input).
4.096 MHz serial clock for
shifting data in/out on the serial streams (Rin, Sin,
Rout, Sout).
SC_set_d2
ICO
N1
Internal Connection.
Connected to VSS for
normal operation
SM_mclk_d2
ICO
L4
Internal Connection.
Connected to VSS for
normal operation
ST_mclk_d2
ICO
M5
Internal Connection.
Connected to VSS for
normal operation
SC_en_d2
ICO
L5
Internal Connection.
Connected to VSS for
normal operation
SC_In_d2
ICO
M1
Internal Connection.
Connected to VSS for
normal operation
SC_Reset:_d2
ICO
M2
Internal Connection.
Connected to VSS for
normal operation
SC_Fclk_d2
ICO
M3
Internal Connection.
Connected to VSS for
normal operation
Tsig(8)_d2
NC
M4
No connection.
The pin must be left open for
normal operation.
Tsig(9)_d2
NC
P1
No connection.
The pin must be left open for
normal operation.
Tsig(10)_d2
NC
P2
No connection.
The pin must be left open for
normal operation.
Pin Description (continued)
Signal Name
Signal Type
BGA Ball #
Signal Description
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