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參數(shù)資料
| 型號： | MT9042C |
| 廠商： | Mitel Networks Corporation |
| 英文描述： | Multitrunk System Synchronizer |
| 中文描述： | Multitrunk系統(tǒng)同步 |
| 文件頁數(shù)： | 2/28頁 |
| 文件大?。?/td> | 113K |
| 代理商： | MT9042C |
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MT9042C
Advance Information
2
Figure 2 - Pin Connections
Pin Description
Pin #
Name
Description (see notes 1 to 5)
1,15
V
SS
TRST
Ground.
0 Volts.
2
TIE Circuit Reset (TTL Input).
A logic low at this input resets the Time Interval Error (TIE)
correction circuit resulting in a re-alignment of input phase with output phase as shown in
Figure 19. The TRST pin should be held low for a minimum of 300ns.
3
SEC
Secondary Reference (TTL Input).
This is one of two (PRI & SEC) input reference
sources (falling edge) used for synchronization. One of three possible frequencies (8kHz,
1.544MHzMHz, or 2.048MHz) may be used. The selection of the input reference is based
upon the MS1, MS2, LOS1, LOS2, RSEL, and GTi control inputs (Automatic or Manual).
4
PRI
Primary Reference (TTL Input).
See pin description for SEC.
5,18
V
DD
OSCo
Positive Supply Voltage.
+5V
DC
nominal.
Oscillator Master Clock (CMOS Output).
For crystal operation, a 20MHz crystal is
connected from this pin to OSCi, see Figure 10. For clock oscillator operation, this pin is left
unconnected, see Figure 9.
6
7
OSCi
Oscillator Master Clock (CMOS Input).
For crystal operation, a 20MHz crystal is
connected from this pin to OSCo, see Figure 10. For clock oscillator operation, this pin is
connected to a clock source, see Figure 9.
8
F16o
Frame Pulse ST-BUS 16.384Mb/s (CMOS Output).
This is an 8kHz 61ns active low
framing pulse, which marks the beginning of an ST-BUS frame. This is typically used for
ST-BUS operation at 16.384Mb/s. See Figure 20.
9
F0o
Frame Pulse ST-BUS 2.048Mb/s (CMOS Output).
This is an 8kHz 244ns active low
framing pulse, which marks the beginning of an ST-BUS frame. This is typically used for
ST-BUS operation at 2.048Mb/s and 4.096Mb/s. See Figure 20.
10
F8o
Frame Pulse ST-BUS 8.192Mb/s (CMOS Output).
This is an 8kHz 122ns active high
framing pulse, which marks the beginning of an ST-BUS frame. This is used for ST-BUS
operation at 8.192Mb/s. See Figure 20.
11
C1.5o
Clock 1.544MHz (CMOS Output).
This output is used in T1 applications.
12
C3o
Clock 3.088MHz (CMOS Output).
This output is used in T1 applications.
13
C2o
Clock 2.048MHz (CMOS Output).
This output is used for ST-BUS operation at 2.048Mb/s.
14
C4o
Clock 4.096MHz (CMOS Output).
This output is used for ST-BUS operation at 2.048Mb/s
and 4.096Mb/s.
1
6
7
8
9
10
11
12 13 14 15 16 17 18
5
4
3
2
23
22
19
20
21
24
25
26
27
28
V
T
S
P
VDD
OSCo
OSCi
F16o
F0o
F8o
C1.5o
GTi
GTo
LOS2
LOS1
MS2
MS1
RSEL
F
F
R
C
V
C
C
V
C
C
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PDF描述 |
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| MT9042CP | Multitrunk System Synchronizer |
| MT9042 | Global Digital Trunk Synchronizer |
| MT9042AP | Global Digital Trunk Synchronizer |
| MT9044 | T1/E1/OC3 System Synchronizer |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MT9042CP | 制造商:Microsemi Corporation 功能描述: 制造商:Mitel Networks Corporation 功能描述: |
| MT9042CP1 | 制造商:Microsemi Corporation 功能描述:SYNCHRONIZER 28PLCC - Rail/Tube 制造商:Microsemi Corporation 功能描述:PB FREE MULTITRUNK SYSTEM SYNCHRONIZER 制造商:Zarlink Semiconductor Inc 功能描述:SYNCHRONIZER 28PLCC - Rail/Tube 制造商:Zarlink Semiconductor Inc 功能描述:PB FREE MULTITRUNK SYSTEM SYNCHRONIZER |
| MT9042CPR1 | 制造商:Microsemi Corporation 功能描述:SYNCHRONIZER 28PLCC - Tape and Reel 制造商:Zarlink Semiconductor Inc 功能描述:SYNCHRONIZER 28PLCC - Tape and Reel |
| MT9043 | 制造商:ZARLINK 制造商全稱:Zarlink Semiconductor Inc 功能描述:T1/E1 System Synchronizer |
| MT9043AN | 制造商:Microsemi Corporation 功能描述: |
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