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4, 8 Meg x 64 DRAM SODIMMs
DM83.p65
–
Rev. 2/99
Micron Technology, Inc., reserves the right to change products or specifications without notice.
1999, Micron Technology, Inc.
23
4, 8 MEG x 64
DRAM SODIMMs
FAST/EDO-PAGE-MODE READ-WRITE CYCLE
25
(LATE WRITE and READ-MODIFY-WRITE cycles)
DON
’
T CARE
UNDEFINED
t
t
OD
tOE
tOD
tOE
tOD
tOE
OPEN
OUT
D
OUT
D
OUT
D
IN
VD
IN
VD
IN
VD
OPEN
tDH
tDS
tAA
tCPA
tCLZ
tCAC
tDH
tDS
tAA
tCPA
tCLZ
tCAC
tDH
tDS
tAA
tCLZ
tCAC
tRAC
tWP
tCWL
tRWL
tCWD
tAWD
tWP
tCWL
tCWD
tAWD
tWP
tCWL
tCWD
tAWD
tRCS
tRWD
tASR
tRAH
tASC
tRAD
tAR
tCAH
tASC
tCAH
tASC
tCAH
tCP
tRSH
tCP
tRP
tRASP
tCP
tRCD
tCSH
tPC
t
CRP
ROW
COLUMN
COLUMN
COLUMN
ROW
V
IL
V
IL
ADDR
V
IL
V
IL
DQ
V
IOL
V
IL
RAS#
OE#
tPRWC
tCAS
OEH
tCAS
tCAS
WE#
CASL#/CASH#
NOTE 1
NOTE:
1.
t
PC is for LATE WRITE cycles only.
t
OD (EDO)
t
OD (FPM)
t
OE (EDO)
t
OE (FPM)
t
OEH (EDO)
t
OEH (FPM)
t
PC (EDO)
t
PC (FPM)
t
PRWC (EDO)
t
PRWC (FPM)
t
RAC
t
RAD (EDO)
t
RAD (FPM)
t
RAH (EDO)
t
RAH (FPM)
t
RASP
t
RCD (EDO)
t
RCD (FPM)
t
RCS
t
RP
t
RSH
t
RWD (EDO)
t
RWD (FPM)
t
RWL
t
WP (EDO)
t
WP (FPM)
0
3
12
13
12
13
0
3
15
15
15
15
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
8
13
20
30
47
76
10
15
25
35
56
85
50
60
9
13
9
8
50
11
18
0
30
13
67
73
13
5
8
12
15
10
10
60
14
20
0
40
15
79
85
15
5
10
125,000
125,000
FAST PAGE MODE AND EDO PAGE MODE
TIMING PARAMETERS
-5
-6
SYMBOL
t
AA
t
AR (EDO)
t
AR (FPM)
t
ASC
t
ASR
t
AWD (EDO)
t
AWD (FPM)
t
CAC
t
CAH
t
CAS (EDO)
t
CAS (FPM)
t
CLZ (EDO)
t
CLZ (FPM)
t
CP
t
CPA (EDO)
t
CPA (FPM)
t
CRP
t
CSH (EDO)
t
CSH (FPM)
t
CWD (EDO)
t
CWD (FPM)
t
CWL (EDO)
t
CWL (FPM)
t
DH
t
DS
MIN
MAX
25
MIN
MAX
30
UNITS
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
38
40
0
0
42
48
45
45
0
0
49
55
13
15
8
8
13
0
3
8
10
10
15
0
3
10
10,000
10,000
10,000
10,000
28
30
35
35
5
38
50
28
36
8
13
8
0
5
45
60
35
40
10
15
10
0
-5
-6
SYMBOL
MIN
MAX
MIN
MAX
UNITS