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參數(shù)資料
| 型號(hào)： | MT89L80 |
| 廠商： | Mitel Networks Corporation |
| 英文描述： | CMOS ST-BUS⑩ FAMILY Digital Switch |
| 中文描述： | 意法半導(dǎo)體的CMOS總線⑩家庭數(shù)字開關(guān) |
| 文件頁(yè)數(shù)： | 10/15頁(yè) |
| 文件大?。?/td> | 75K |
| 代理商： | MT89L80 |
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MT89L80
Advance Information
2-12
Timing is over recommended temperature & power supply voltages.
Typical figures are at 25
°
C and are for design aid only: not guaranteed and not subject to production testing.
* Contents of Connection Memory are not lost if the clock stops, however, ST-BUS outputs go into the high impedance state.
NB:
Frame Pulse is repeated every 512 cycles of C4i.
Figure 9- Frame Alignment
Figure 10 - Clock Timing
AC Electrical Characteristics
- Clock Timing (Figures 9 and 10)
Characteristics
Sym
Min
Typ
Max
Units
Test Conditions
1
I
N
P
U
T
S
Clock Period*
t
CLK
220
244
300
ns
2
Clock Width High
t
CH
85
122
150
ns
3
Clock Width Low
t
CL
85
122
150
ns
4
Clock Transition Time
t
CTT
10
ns
5
Frame Pulse SetupTime
t
FPS
10
190
ns
6
Frame Pulse Hold Time
t
FPH
10
190
ns
7
Frame Pulse Width
t
FPW
244
ns
C4i
F0i
BIT
CELLS
Channel 31
Bit o
Channel 0
Bit 7
t
CLK
t
CTT
t
CH
t
CHL
t
CTT
t
FPH
t
FPS
t
FPH
t
FPS
t
FPW
t
CL
C4i
F0i
V
HM
V
LM
V
HM
V
LM
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