參數(shù)資料
型號(hào)： MT8986AP
廠商： Toshiba Corporation
英文描述： CMOS ST-BUS Family Multiple Rate Digital Switch
中文描述： 意法半導(dǎo)體的CMOS總線家庭多速率數(shù)字開(kāi)關(guān)
文件頁(yè)數(shù)： 18/46頁(yè)
文件大?。?/td> 765K
代理商： MT8986AP
MT8986
Data Sheet
18
Zarlink Semiconductor Inc.
Connection Memory High - Read/Write
Figure 5 - Connection Memory High (CMH) Bits
x=Don’t care
BIT
NAME
DESCRIPTION
6
V/C
Variable/Constant Throughput Delay Mode.
This bit is used to select between Variable (LOW)
and Constant Delay (HIGH) modes in a per-channel basis. Tables 1 and 2 describe the switching
configurations that have this function. In the modes where this function is not available, this bit
has not effect.
5
SAB3
Source Stream Address bit 3.
This bit is used along with bits SAB0-2 in CML to select up to 16
different source streams for the connection. Depending on the state of DMO bit and the switching
configuration enabled, not all SAB3-0 bits have to be used.
See Tables 9 and 10 for details on the utilization of the SAB bits.
4-3
CAB6-5
Source Channel Address bits 5 and 6.
These two bits are used together with bits CAB0-4 in
Connect Memory Low to select up 128 different source channels for the connection. Depending
on the data rate used in the input/output streams, 5, 6 or all 7 CAB bits can be used respectively, to
select 32, 64 or 128 different channels.
See Tables 9 and 10 for details on the utilization of the CAB bits.
2
MC
Message Channel.
When 1, the contents of the corresponding location in Connection Memory
Low are output on the corresponding channel and stream. When 0, the contents of the
programmed location in Connection Memory Low act as an address for the Data Memory and so
determine the source of the connection to the location’s channel and stream.
1
CSTo
CSTo Bit.
This bit is only available in 2.048 Mb/s applications. It drives a bit time on the CSTo
output pin.
0
OE
Output Enable.
This bit enables the output drivers on a per-channel basis. This allows individual
channels on individual streams to be made high-impedance, allowing switch matrices to be
constructed. A HIGH enables the driver and a LOW disables it.
X
V/C
SAB3
CAB6
CAB5
MC
CSTo
OE
7
6
5
4
3
2
1
0
(CM high bits)
相關(guān)PDF資料
PDF描述
MT8986AL CMOS ST-BUS Family Multiple Rate Digital Switch
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MT8986AL CMOS ST-BUS⑩ FAMILY Multiple Rate Digital Switch
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