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參數(shù)資料
| 型號： | MT8986AE |
| 廠商： | Toshiba Corporation |
| 英文描述： | CMOS ST-BUS Family Multiple Rate Digital Switch |
| 中文描述： | 意法半導(dǎo)體的CMOS總線家庭多速率數(shù)字開關(guān) |
| 文件頁數(shù)： | 13/46頁 |
| 文件大?。?/td> | 765K |
| 代理商： | MT8986AE |
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MT8986
Data Sheet
13
Zarlink Semiconductor Inc.
Table 5 - Address Memory Map
*:
**: channels 0 to 63 are used in 4.096 Mb/s (Nibble Switching, 4 x 4, 8 x 4 or Different I/O rates)
***: channels 0 to 127 are used in 8.192 Mb/s (2 x 2 or Different I/O rates)
channels 0 to 31 are used in 2.048 Mb/s (8 x 8, 16 x 8 and 10 x 10)
Bit 7 (Slip Memory) of the Control register allows split memory operation whereby reads are from the Data memory
and writes are to the Connect Memory LOW.
The Message Enable bit (bit 6) places every output channel on every output stream in message mode; i.e., the
contents of the Connect Memory LOW (CML) are output on the ST-BUS output streams once every frame unless
the ODE input pin is LOW. If ME bit is HIGH, then the MT8986 behaves as if bits 2 (Message Channel) and 0
(Output Enable) of every Connect Memory HIGH (CMH) locations were set to HIGH, regardless of the actual value.
If ME bit is LOW, then bit 2 and 0 of each Connect Memory HIGH location function normally. In this case, if bit 2 of
the CMH is HIGH, the associated ST-BUS output channel is in Message mode. If bit 2 of the CMH is LOW, then the
contents of the SAB and CAB bits of the CMH and CML define the source information (stream and channel) of the
time-slot that is to be switched to an output.
If the ODE input pin is LOW, then all serial outputs are high-impedance. If ODE is HIGH, then bit 0 (Output Enable)
of the CMH location enables (if HIGH) or disables (if LOW) the output drivers for the corresponding individual ST-
BUS output stream and channel.
The contents of bit 1 (CSTo) of each Connection Memory High location is output on CSTo pin once every frame.
The CSTo pin is a 2048 Mbit/s output which carries 256 bits. If CSTo bit is set HIGH, the corresponding bit on CSTo
output is transmitted HIGH. If CSTo bit is LOW, the corresponding bit on the CSTo output is transmitted LOW. The
contents of the 256 CSTo bits of the CMH are transmitted sequentially on to the CSTo output pin and are
synchronous to the 2.048 Mb/s ST-BUS streams. To allow for delay in any external control circuitry the contents of
the CSTo bit is output one channel before the corresponding channel on the ST-BUS streams. For example, the
contents of CSTo bit in position 0 (ST0, CH0) of the CMH, is transmitted synchronously with ST-BUS channel 31, bit
7. The contents of CSTo bit in position 32 (ST1, CH0) of the CMH is transmitted during ST-BUS channel 31 bit 6.
For more detailed description of the CSTo operation, see section 6 of Application Note MSAN-123.
The Bit V/C (Variable/Constant Delay) of each Connect Memory High location allows the per-channel selection
between Variable and Constant throughput delay modes.
A7
A6
A5
A4
A3
A2
A1
A0
Location
X
X
X
X
0
0
0
0
0
0
1
1
X
X
X
X
0
0
0
1
1
1
0
1
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
0
0
0
0
0
1
0
0
1
0
1
0
0
0
0
0
0
1
0
0
1
0
1
0
0
0
0
0
0
1
0
0
1
0
1
0
0
1
1
0
0
1
0
0
1
0
1
0
1
0
1
0
1
1
0
1
1
0
1
Control Register
Interface Mode Select Register
Stream Pair Select Register
Frame Input Offset Register
Channel 0*
Channel 1*
Channel 31*
Channel 32**
Channel 33**
Channel 63**
Channel 64***
Channel 127***
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| MT8986APR1 | CMOS ST-BUS Family Multiple Rate Digital Switch |
| MT8986APR | CMOS ST-BUS Family Multiple Rate Digital Switch |
| MT8986AP1 | CMOS ST-BUS Family Multiple Rate Digital Switch |
| MT8986AP | CMOS ST-BUS Family Multiple Rate Digital Switch |
| MT8986AL | CMOS ST-BUS Family Multiple Rate Digital Switch |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MT8986AE1 | 制造商:Microsemi Corporation 功能描述:PB FREE MULTIPLE RATE DIGITAL SWITCH 制造商:Microsemi Corporation 功能描述:SWIT FABRIC 256 X 256/512 X 256/128 X 128 131.072MBPS 5V 40P - Rail/Tube 制造商:MICROSEMI CONSUMER MEDICAL PRODUCT GROUP 功能描述:IC TDM/TSI SWITCH 512X256 40PDIP 制造商:Microsemi Corporation 功能描述:IC TDM/TSI SWITCH 512X256 40PDIP |
| MT8986AL | 制造商:Microsemi Corporation 功能描述:SWIT FABRIC 256 X 256/512 X 256/128 X 128 131.072MBPS 5V 44M - Trays 制造商:Zarlink Semiconductor Inc 功能描述:SWIT FABRIC 256 X 256/512 X 256/128 X 128 131.072MBPS 5V 44M - Trays |
| MT8986AL1 | 制造商:Microsemi Corporation 功能描述:SWIT FABRIC 256 X 256/512 X 256/128 X 128 131.072MBPS 5V 44M - Trays 制造商:Zarlink Semiconductor Inc 功能描述:SWIT FABRIC 256 X 256/512 X 256/128 X 128 131.072MBPS 5V 44M - Trays |
| MT8986AP | 制造商:Microsemi Corporation 功能描述: |
| MT8986AP1 | 制造商:Microsemi Corporation 功能描述:SWIT FABRIC 256 X 256/512 X 256/128 X 128 131.072MBPS 5V 44P - Rail/Tube 制造商:MICROSEMI CONSUMER MEDICAL PRODUCT GROUP 功能描述:IC TDM/TSI SWITCH 512X256 44PLCC 制造商:Microsemi Corporation 功能描述:IC TDM/TSI SWITCH 512X256 44PLCC |
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