參數(shù)資料
型號: MT88L85AN
廠商: Mitel Networks Corporation
英文描述: 3V Integrated DTMFTransceiver with Power Down & Adaptive Micro Interface
中文描述: 3V的集成DTMFTransceiver與掉電
文件頁數(shù): 2/20頁
文件大?。?/td> 350K
代理商: MT88L85AN
MT88L85
Advance Information
4-72
Figure 2 - Pin Connections
Pin Description
Pin #
Name
Description
24
28
1
2
3
1
2
4
IN+
IN-
GS
Non-inverting
op-amp input.
Inverting
op-amp input.
Gain Select
. Gives access to output of front end differential amplifier for connection of
feedback resistor.
Reference Voltage
output (V
DD
/2).
Ground (0V).
Oscillator
input. This pin can also be driven directly by an external clock.
Oscillator
output. A 3.579545 MHz crystal connected between OSC1 and OSC2 completes
the internal oscillator circuit. Leave open circuit when OSC1 is driven externally.
Output from internal DTMF transmitter.
13 R/W
(
WR
)
(Motorola)
Read/Write
or (Intel)
Write
microprocessor input. CMOS compatible.
14
CS
Chip Select
input. This signal must be qualified externally by either address strobe (AS),
valid memory address (VMA) or address latch enable (ALE) signal, see Figure 12.
15
RS0
Register Select
input. Refer to Table 3 for bit interpretation. CMOS compatible.
17
DS
(
RD) (Motorola)
Data Strobe
or (Intel)
Read
microprocessor input. Activity on this input is only
required when the device is being accessed. CMOS compatible.
18
IRQ/CP
Interrupt Request/Call Progress
(open drain) output. In interrupt mode, this output goes
low when a valid DTMF tone burst has been transmitted or received. In call progress mode,
this pin will output a rectangular signal representative of the input signal applied at the input
op-amp. The input signal must be within the bandwidth limits of the call progress filter, see
Figure 8.
19
PWDN
Power Down
(input). Active High. Powers down the device and inhibits the oscillator. IRQ
and TONE output are high impedance. Data bus is held in tri-state. This pin is internally
pulled down.
18-
21
(Intel). TTL compatible.
22
ESt
Early Steering
output. Presents a logic high once the digital algorithm has detected a valid
tone pair (signal condition). Any momentary loss of signal condition will cause ESt to return
to a logic low.
23
St/GT
Steering Input/Guard Time
output (bidirectional). A voltage greater than V
TSt
detected at
St causes the device to register the detected tone pair and update the output latch. A
voltage less than V
TSt
frees the device to accept a new tone pair. The GT output acts to
reset the external steering time-constant; its state is a function of ESt and the voltage on St.
24
V
DD
Positive power supply (3V typ.).
4
5
6
7
6
7
8
9
V
Ref
V
SS
OSC1
OSC2
10
11
12
12
TONE
13
14
15
16
14-
17
18
D0-D3
Microprocessor data bus. High impedance when CS = 1 or DS =0 (Motorola) or RD = 1
19
20
NC
NC
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
24
23
22
21
20
19
18
17
IN+
IN-
GS
VRef
VSS
OSC1
OSC2
TONE
R/W/WR
CS
VDD
St/GT
ESt
D3
D2
D1
D0
NC
PWDN
IRQ/CP
DS/RD
RS0
24 PIN DIP/SSOP
2
4
3
2
1
2
2
5
6
7
8
9
10
11
25
24
23
22
21
20
19
1
1
1
1
1
1
1
NC
NC
VRef
VSS
OSC1
OSC2
NC
G
N
I
I
V
S
E
D3
D2
D1
D0
NC
PWDN
NC
T
R
28 PIN PLCC
C
R
N
D
I
相關(guān)PDF資料
PDF描述
MT88L85AP 3V Integrated DTMFTransceiver with Power Down & Adaptive Micro Interface
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MT88L89AC 3V Integrated DTMFTransceiver with Adaptive Micro Interface
MT88L89AE 3V Integrated DTMFTransceiver with Adaptive Micro Interface
MT88L89AN 3V Integrated DTMFTransceiver with Adaptive Micro Interface
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參數(shù)描述
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MT88L85AP 制造商:MITEL 制造商全稱:Mitel Networks Corporation 功能描述:3V Integrated DTMFTransceiver with Power Down & Adaptive Micro Interface
MT88L89 制造商:MITEL 制造商全稱:Mitel Networks Corporation 功能描述:3V Integrated DTMFTransceiver with Adaptive Micro Interface