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Preliminary Information
MT88E43B
59
Figure 7 - Differential Input Configuration
FSK Demodulation
The MT88E43B first bandpass filters and then
demodulates the FSK signal. The carrier detector
provides an indication of the presence of signal at
the bandpass filter output. The MT88E43B’s dual
mode 3-wire interface allows convenient extraction of
the 8-bit data words in the demodulated FSK bit
stream.
Note that signals such as CAS/Tone Alert Signal,
speech and DTMF tones lie in the same frequency
band as FSK. They will, therefore, be demodulated
and as a result, false data will be generated. To avoid
demodulation of false data, an FSKen pin is provided
so that the FSK demodulator may be disabled when
FSK signal is not expected. There are two events
that if either is true, should be used to disable
FSKen. The events are the carrier detector output
CD returning high or receiving all the data indicated
by the message length word.
Table 2 shows the BT and Bellcore FSK signal
characteristics. The BT frequencies correspond to
CCITT v.23 format. The Bellcore frequencies
correspond to Bell 202. The U.K.’s CCA requires that
the TE be able to receive both CCITT v.23 and Bell
202 formats. The MT88E43B is compatible with both
formats without any adjustment.
3-wire FSK Data Interface
The MT88E43B provides a powerful dual mode
3-wire interface so that the 8-bit data words in the
demodulated FSK bit stream can be extracted
without the need either for an external UART or for
the TE/CPE’s microcontroller to perform the UART
function in software. The interface is specifically
designed for the 1200 baud rate and is comprised of
the DATA, DCLK (data clock) and DR (data ready)
pins. Two modes (modes 0 and 1) are selectable via
control of the device’s MODE pin: in mode 0, data
transfer is initiated by the MT88E43B; in mode 1,
data
transfer
is
initiated
microcontroller.
by
the
external
Mode 0
This mode is selected when the MODE pin is low. In
this mode, data transfer is initiated by the device.
The
MT88E43B
receives
demodulates it, and outputs the data directly to the
DATA pin (refer to Figure 14). For each received stop
and start bit sequence, the MT88E43B outputs a
the
FSK
signal,
a. The signal power is expressed in dBm referenced to 600
ohm at the CPE Tip/Ring (A/B) interface.
b. SR-3004, Issue 2, January 1995.
c. The frequency range is specified in GR-30-CORE.
d. Up to 20 marks may be inserted in specific places in a single
or multiple data message.
C1
R1
C2
R4
R3
R2
R5
IN+
IN-
GS
V
Ref
Differential Input Amplifier
C1 = C2
R1 = R4 (For unity gain R5= R4)
R3 = (R2R5) / (R2 + R5)
Voltage Gain
(A
V
diff) = R5/R1 (see Figure 9,10,11)
Input Impedance
(Z
IN
diff) = 2
R1
2
+ (1/
ω
C)
2
Item
BT
Bellcore
Mark
frequency
(logic 1)
1300Hz
±
1.5%
1200Hz
±
1%
Space
frequency
(logic 0)
2100Hz
±
1.5%
2200Hz
±
1%
Received
signal level
-8 to -40dBV
(-5.78 to
-37.78dBm)
-12 to -36dBm
a
Signal level
differential
(Twist)
up to 6dB
up to 10dB
b
Unwanted
signals
<= -20dB
(300-3400Hz)
<= -25dB
(0-4kHz)
c
Transmission
rate
1200 baud
±
±1%
1200 baud
±
±1%
Word format
1 start bit (logic
0), 8 bit word
(LSB first), 1 to
10 stop bits
(logic 1)
1 start bit (logic
0), 8 bit word
(LSB first),
1 stop bit
(logic 1)
d
Table 2 - FSK Characteristics