參數(shù)資料
型號(hào)： MT88E39AS
廠商： Mitel Networks Corporation
英文描述： XLR Style Audio Connector
中文描述： 主叫號(hào)碼識(shí)別的CMOS電路（CNIC1.1）
文件頁(yè)數(shù)： 8/14頁(yè)
文件大小： 98K
代理商： MT88E39AS
MT88E39
Advance Information
5-8
* Exceeding these values may cause permanent damage. Functional operation under these conditions is not implied.
DC Electrical Characteristics are over recommended operating conditions unless otherwise stated.
* Typical figures are at 25
°
C and are for design aid only.
Notes*:
1.PWDN=Vdd. FSK input = 0 mVrms. Digital inputs at either Vdd or Vss. No current drawn from output pins.
2.PWDN=Vss. FSK input = 0 mVrms. With no current drawn from Vref, OSC2 and all digital pins.
Absolute Maximum Ratings
*
-
Voltages are with respect to V
SS
unless otherwise stated.
Parameter
Symbol
Min
Max
Units
1
DC Power Supply Voltage V
DD
to V
SS
Voltage on any pin
V
DD
V
P
I
I/O
-0.3
6
V
2
-0.3
V
DD
+0.3
±
10
V
3
Current at any pin (except V
DD
and V
SS
)
Storage Temperature
mA
4
T
ST
P
D
-65
+150
°
C
5
Package Power Dissipation
500
mW
Recommended Operating Conditions
- Voltages are with respect to ground (V
SS
) unless otherwise stated
Characteristics
Sym
Min
Typ
Max
Units
Test Conditions
1
DC Power Supply Voltage
V
DD
f
OSC
fc
2.7
5.5
V
2
Clock Frequency
3.579545
MHz
3
Tolerance on Clock Frequency
±
0.2
%
4
Operating Temperature
-40
+85
°
C
DC Electrical Characteristics
Characteristics
Sym
Min
Typ*
Max
Units
Test
Conditions
1
S
U
P
P
L
Y
Standby Supply Current
I
DDQ
I
DD
0.1
15
μ
A
Notes* 1
2
Operating Supply Current
V
DD
=3.0V, 25
o
C
V
DD
=5.0V, 25
o
C
1.2
1.9
2.0
3.0
mA
mA
Notes* 2
3
DR,
CD,
DATA,
DCLK
Sink Current
I
OL
I
OH
2.5
mA
V
OL
=0.1V
DD
V
OH
=0.9V
DD
4
Source current
DATA
DCLK (in mode 0)
DR, CD (in mode 1)
0.8
mA
5
DR, CD
Output hi-Z current
(in mode 0)
I
OZ
10
μ
A
V
OZ
=V
SS
to V
DD
6
PWDN,
DCLK
(in
mode 1)
Schmitt Input High Threshold
Schmitt Input Low Threshold
V
T+
V
T-
0.48*V
DD
0.28*V
DD
0.68*V
DD
0.48*V
DD
V
V
7
Schmitt Hysteresis
V
HYS
V
IH
V
IL
I
IN
0.2
V
8
MODE
CMOS Input High Voltage
CMOS Input Low Voltage
0.7*V
DD
V
SS
V
DD
0.3*V
DD
10
V
9
PWDN,
DCLK,
MODE
Input Current
μ
A
V
SS
≤
V
IN
≤
V
DD
10
VRef
Output Voltage
V
Ref
R
Ref
0.5*V
DD
- 0.1
0.5*V
DD
+ 0.1
2
V
No Load
11
Output Resistance
k
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