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參數(shù)資料
| 型號： | MT58L128V18P |
| 廠商： | Micron Technology, Inc. |
| 英文描述： | 128K x 18, Pipelined, SCD SyncBurst SRAM(2Mb，流水線式，單循環(huán)取消選擇，同步脈沖靜態(tài)存儲器) |
| 中文描述： | 128K的× 18，流水線，SCD的SyncBurst的SRAM（處理器，流水線式，單循環(huán)取消選擇，同步脈沖靜態(tài)存儲器） |
| 文件頁數(shù)： | 22/25頁 |
| 文件大?。?/td> | 487K |
| 代理商： | MT58L128V18P |
22
2Mb: 128K x 18, 64K x 32/36 Pipelined, SCD SyncBurst SRAM
MT58L128L18P_2.p65 – Rev. 8/00
Micron Technology, Inc., reserves the right to change products or specifications without notice.
2000, Micron Technology, Inc.
2Mb: 128K x 18, 64K x 32/36
PIPELINED, SCD SYNCBURST SRAM
READ/WRITE TIMING
tKC
tKL
CLK
ADSP#
tADSH
tADSS
ADDRESS
tKH
OE#
ADSC#
CE#
(NOTE 2)
tAH
tAS
A2
tCEH
tCES
BWE#,
BWa#-BWd#
(NOTE 4)
Q
High-Z
ADV#
Single WRITE
D(A3)
A4
A5
A6
D(A5)
D(A6)
D
BURST READ
Back-to-Back READs
(NOTE 5)
High-Z
Q(A2)
Q(A1)
Q(A4)
Q(A4+1)
Q(A4+2)
tWH
tWS
Q(A4+3)
tOEHZ
tDH
tDS
tOELZ
(NOTE 1)
tKQLZ
tKQ
Back-to-Back
WRITEs
A1
DON’T CARE
UNDEFINED
A3
NOTE:
1. Q(A4) refers to output from address A4. Q(A4 + 1) refers to output from the next internal burst address following A4.
2. CE2# and CE2 have timing identical to CE#. On this diagram, when CE# is LOW, CE2# is LOW and CE2 is HIGH. When CE#
is HIGH, CE2# is HIGH and CE2 is LOW.
3. The data bus (Q) remains in High-Z following a WRITE cycle unless an ADSP#, ADSC# or ADV# cycle is performed.
4. GW# is HIGH.
5. Back-to-back READs may be controlled by either ADSP# or ADSC#.
t
ADSS
t
WS
t
DS
t
CES
t
AH
t
ADSH
t
WH
t
DH
t
CEH
1.5
1.5
1.5
1.5
0.5
0.5
0.5
0.5
0.5
1.5
1.5
1.5
1.5
0.5
0.5
0.5
0.5
0.5
1.5
1.5
1.5
1.5
0.5
0.5
0.5
0.5
0.5
2.2
2.2
2.2
2.2
0.5
0.5
0.5
0.5
0.5
ns
ns
ns
ns
ns
ns
ns
ns
ns
-5
-6
-7.5
-10
SYMBOL
MIN MAX MIN MAX MIN MAX MIN MAX
UNITS
READ/WRITE TIMING PARAMETERS
-5
-6
-7.5
-10
SYMBOL
t
KC
f
KF
t
KH
t
KL
t
KQ
t
KQLZ
t
OELZ
t
OEHZ
t
AS
MIN MAX MIN MAX MIN MAX MIN MAX
5.0
6.0
200
166
1.6
1.7
1.6
1.7
3.5
3.5
0
1.5
0
0
3.0
3.5
1.5
1.5
UNITS
ns
MHz
ns
ns
ns
ns
ns
ns
ns
7.5
10
133
100
1.9
1.9
3.2
3.2
4.0
5.0
1.5
0
1.5
0
4.0
4.5
1.5
2.2
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| MT58L64L32P | 64K x 32,Pipelined, SCD SyncBurst SRAM(2Mb，流水線式，單循環(huán)取消選擇，同步脈沖靜態(tài)存儲器) |
| MT58L64V32P | 64K x 32,Pipelined, SCD SyncBurst SRAM(2Mb，流水線式，單循環(huán)取消選擇，同步脈沖靜態(tài)存儲器) |
| MT58L64L36P | 64K x 36,Pipelined, SCD SyncBurst SRAM(2Mb，流水線式，單循環(huán)取消選擇，同步脈沖靜態(tài)存儲器) |
| MT58L64V36P | 64K x 36,Pipelined, SCD SyncBurst SRAM(2Mb，流水線式，單循環(huán)取消選擇，同步脈沖靜態(tài)存儲器) |
| MT58L128L32D1 | 128K x 32，3.3V I/O Pipelined, DCD SyncBurst SRAM(4Mb，3.3V輸入/輸出，流水線式，雙循環(huán)取消選擇，同步脈沖靜態(tài)存儲器) |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MT58L128V18PT-7.5 | 制造商:Micron Technology Inc 功能描述: |
| MT58L128V32F1 | 制造商:MICRON 制造商全稱:Micron Technology 功能描述:4Mb: 256K x 18, 128K x 32/36 FLOW-THROUGH SYNCBURST SRAM |
| MT58L128V32P1T-10 | 制造商:Rochester Electronics LLC 功能描述:- Bulk 制造商:Micron Technology Inc 功能描述: |
| MT58L128V32P1T-7.5 | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| MT58L128V36F1 | 制造商:MICRON 制造商全稱:Micron Technology 功能描述:4Mb: 256K x 18, 128K x 32/36 FLOW-THROUGH SYNCBURST SRAM |
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