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參數(shù)資料
| 型號(hào)： | MT58L128V18F |
| 廠商： | Micron Technology, Inc. |
| 英文描述： | 128K x 18, Flow-Through SyncBurst SRAM(2Mb,流通式同步脈沖靜態(tài)RAM) |
| 中文描述： | 128K的× 18，流量通過(guò)SyncBurst的SRAM（處理器，流通式同步脈沖靜態(tài)內(nèi)存） |
| 文件頁(yè)數(shù)： | 19/24頁(yè) |
| 文件大?。?/td> | 459K |
| 代理商： | MT58L128V18F |
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2Mb: 128K x 18, 64K x 32/36 Flow-Through SyncBurst SRAM
MT58L128L18F_2.p65 – Rev. 8/00
Micron Technology, Inc., reserves the right to change products or specifications without notice.
2000, Micron Technology, Inc.
2Mb: 128K x 18, 64K x 32/36
FLOW-THROUGH SYNCBURST SRAM
READ TIMING
tKC
tKL
CLK
ADSP#
tADSH
tADSS
ADDRESS
tKH
OE#
ADSC#
CE#
(NOTE 2)
tAH
tAS
A1
tCEH
tCES
BWa#-BWd#
Q
High-Z
tKQLZ
tKQX
tKQ
ADV#
tOEHZ
tKQ
Single READ
BURST
READ
tOEQ
tOELZ
tKQHZ
Burst wraps around
to its initial state.
tAAH
tAAS
tWH
tWS
tADSH
tADSS
Q(A2)
Q(A2 + 1)
Q(A2 + 2)
Q(A1)
Q(A2)
Q(A2 + 1)
Q(A2 + 2)
Q(A2 + 3)
A2
(NOTE 1)
BWE#, GW#,
ADV# suspends burst.
DONT CARE
UNDEFINED
Deselect Cycle
(Note 4)
NOTE:
1. Q(A2) refers to output from address A2. Q(A2 + 1) refers to output from the next internal burst address following A2.
2. CE2# and CE2 have timing identical to CE#. On this diagram, when CE# is LOW, CE2# is LOW and CE2 is HIGH. When
CE# is HIGH, CE2# is HIGH and CE2 is LOW.
3. Timing is shown assuming that the device was not enabled before entering into this sequence.
4. Outputs are disabled
t
KQHZ after deselect.
-6.8
-7.5
-8.5
-10
SYMBOL
t
AS
t
ADSS
t
AAS
t
WS
t
CES
t
AH
t
ADSH
t
AAH
t
WH
t
CEH
MIN MAX MIN MAX MIN MAX MIN MAX
1.8
2.0
1.8
2.0
1.8
2.0
1.8
2.0
1.8
2.0
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
UNITS
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
2.0
2.0
2.0
2.0
2.0
0.5
0.5
0.5
0.5
0.5
2.5
2.5
2.5
2.5
2.5
0.5
0.5
0.5
0.5
0.5
READ TIMING PARAMETERS
-6.8
-7.5
-8.5
-10
SYMBOL
t
KC
f
KF
t
KH
t
KL
t
KQ
t
KQX
t
KQLZ
t
KQHZ
t
OEQ
t
OELZ
t
OEHZ
MIN MAX MIN MAX MIN MAX MIN MAX
8.0
8.8
125
113
1.8
1.9
1.8
1.9
6.8
7.5
1.5
1.5
1.5
1.5
3.8
4.2
3.8
4.2
0
0
3.8
4.2
UNITS
ns
MHz
ns
ns
ns
ns
ns
ns
ns
ns
ns
10.0
15
100
66
1.9
1.9
4.0
4.0
8.5
10.0
3.0
1.5
3.0
1.5
5.0
5.0
5.0
5.0
0
0
5.0
5.0
相關(guān)PDF資料 |
PDF描述 |
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| MT58L64L32F | 64K x 32,Flow-Through SyncBurst SRAM(2Mb,流通式同步脈沖靜態(tài)RAM) |
| MT58L64L36F | 64K x 36,Flow-Through SyncBurst SRAM(2Mb,流通式同步脈沖靜態(tài)RAM) |
| MT58L128L18P | 128K x 18, Pipelined, SCD SyncBurst SRAM(2Mb，流水線式，單循環(huán)取消選擇，同步脈沖靜態(tài)存儲(chǔ)器) |
| MT58L128V18P | 128K x 18, Pipelined, SCD SyncBurst SRAM(2Mb，流水線式，單循環(huán)取消選擇，同步脈沖靜態(tài)存儲(chǔ)器) |
| MT58L64L32P | 64K x 32,Pipelined, SCD SyncBurst SRAM(2Mb，流水線式，單循環(huán)取消選擇，同步脈沖靜態(tài)存儲(chǔ)器) |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MT58L128V18FT-10 | 制造商:MICRON 制造商全稱:Micron Technology 功能描述:2Mb: 128K x 18, 64K x 32/36 FLOW-THROUGH SYNCBURST SRAM |
| MT58L128V18FT-6.8 | 制造商:MICRON 制造商全稱:Micron Technology 功能描述:2Mb: 128K x 18, 64K x 32/36 FLOW-THROUGH SYNCBURST SRAM |
| MT58L128V18FT-7.5 | 制造商:MICRON 制造商全稱:Micron Technology 功能描述:2Mb: 128K x 18, 64K x 32/36 FLOW-THROUGH SYNCBURST SRAM |
| MT58L128V18FT-8.5 | 制造商:MICRON 制造商全稱:Micron Technology 功能描述:2Mb: 128K x 18, 64K x 32/36 FLOW-THROUGH SYNCBURST SRAM |
| MT58L128V18PT-7.5 | 制造商:Micron Technology Inc 功能描述: |
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