參數(shù)資料
型號: MSP430F2370IYFFR
廠商: Texas Instruments
文件頁數(shù): 64/65頁
文件大?。?/td> 0K
描述: IC MCU 16BIT 32K FLASH 49-DSBGA
產(chǎn)品培訓模塊: The Ultra-Low Power MSP430
MSP430 Overview
MSP430 Design Tools
MSP430 Peripherals
Portable Medical Solutions with MSP430
MSP430 for Utility Metering Solutions
MSP430: How to JTAG
MSP430, How To Use the Clock System
Grace Software Graphical User Interface
MCU Overview
Driver Library
MSP430Ware Overview
標準包裝: 1
系列: MSP430F2xx
核心處理器: RISC
芯體尺寸: 16-位
速度: 16MHz
連通性: I²C,IrDA,LIN,SCI,SPI,UART/USART
外圍設備: 欠壓檢測/復位,POR,PWM,WDT
輸入/輸出數(shù): 32
程序存儲器容量: 32KB(32K x 8 + 256B)
程序存儲器類型: 閃存
RAM 容量: 2K x 8
電壓 - 電源 (Vcc/Vdd): 1.8 V ~ 3.6 V
數(shù)據(jù)轉換器: 斜率 A/D
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 85°C
封裝/外殼: 49-UFBGA,DSBGA
包裝: 標準包裝
產(chǎn)品目錄頁面: 712 (CN2011-ZH PDF)
配用: 296-23115-ND - TOOL FLASH EMU MSP430 40PIN RHA
其它名稱: 296-24336-6
General-Purpose Register
Program Counter
Stack Pointer
Status Register
Constant Generator
General-Purpose Register
PC/R0
SP/R1
SR/CG1/R2
CG2/R3
R4
R5
R12
R13
General-Purpose Register
R6
R7
General-Purpose Register
R8
R9
General-Purpose Register
R10
R11
General-Purpose Register
R14
R15
MSP430F23x0
SLAS518E
– AUGUST 2006 – REVISED AUGUST 2011
SHORT-FORM DESCRIPTION
CPU
The MSP430
CPU has a 16-bit RISC architecture
that is highly transparent to the application. All
operations, other than program-flow instructions, are
performed as register operations in conjunction with
seven addressing modes for source operand and four
addressing modes for destination operand.
The CPU is integrated with 16 registers that provide
reduced
instruction
execution
time.
The
register-to-register operation execution time is one
cycle of the CPU clock.
Four of the registers, R0 to R3, are dedicated as
program counter, stack pointer, status register, and
constant
generator
respectively.
The
remaining
registers are general-purpose registers.
Peripherals are connected to the CPU using data,
address, and control buses and can be handled with
all instructions.
Instruction Set
The instruction set consists of 51 instructions with
three formats and seven address modes. Each
instruction can operate on word and byte data.
Table 4 shows examples of the three types of
instruction formats; Table 5 shows the address
modes.
Table 4. Instruction Word Formats
INSTRUCTION FORMAT
EXAMPLE
OPERATION
Dual operands, source-destination
ADD R4,R5
R4 + R5
→ R5
Single operands, destination only
CALL R8
PC
→ (TOS), R8 → PC
Relative jump, unconditional/conditional
JNE
Jump-on-equal bit = 0
Table 5. Address Mode Descriptions
ADDRESS MODE
S(1)
D(2)
SYNTAX
EXAMPLE
OPERATION
Register
MOV Rs,Rd
MOV R10,R11
R10
→ R11
Indexed
MOV X(Rn),Y(Rm)
MOV 2(R5),6(R6)
M(2+R5)
→ M(6+R6)
Symbolic (PC relative)
MOV EDE,TONI
M(EDE)
→ M(TONI)
Absolute
MOV
&MEM,&TCDAT
M(MEM)
→ M(TCDAT)
Indirect
MOV @Rn,Y(Rm)
MOV @R10,Tab(R6)
M(R10)
→ M(Tab+R6)
M(R10)
→ R11
Indirect autoincrement
MOV @Rn+,Rm
MOV @R10+,R11
R10 + 2
→ R10
Immediate
MOV #X,TONI
MOV #45,TONI
#45
→ M(TONI)
(1)
S = source
(2)
D = destination
8
Copyright
2006–2011, Texas Instruments Incorporated
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