參數(shù)資料
型號(hào): MPT612FBD48
廠商: NXP SEMICONDUCTORS
元件分類: 模擬信號(hào)調(diào)理
英文描述: Maximum power point tracking IC
中文描述: SPECIALTY ANALOG CIRCUIT, PQFP48
封裝: 7 X 7 MM, 1.40 MM HEIGHT, PLASTIC, MS-026, SOT313-2, LQFP-48
文件頁(yè)數(shù): 9/37頁(yè)
文件大?。?/td> 607K
代理商: MPT612FBD48
NXP Semiconductors
MPT612
Maximum power point tracking IC
7. Functional description
7.1 Architectural overview
The ARM7TDMI-S is a general purpose 32-bit processor core offering high performance
and very low power consumption. The ARM architecture is based on Reduced Instruction
Set Computer (RISC) principles making the instruction set and decode mechanisms are
much simpler than those of micro programmed Complex Instruction Set Computers
(CISC). This simplicity results in a high instruction throughput and impressive real-time
interrupt response from a small, cost-effective processor core.
Pipeline techniques are employed ensuring all parts of the processing and memory
systems can operate continuously. Typically, while one instruction is being executed, its
successor is being decoded and a third instruction is being read from memory.
The ARM7TDMI-S processor also employs a unique architectural strategy known as
Thumb which makes it ideally suited to high-volume applications with memory
restrictions, or applications where code density is an issue.
The key idea behind Thumb is a super-reduced instruction set. Essentially, the
ARM7TDMI-S processor has two instruction sets:
the standard 32-bit ARM set
the 16-bit Thumb set
The Thumb set’s 16-bit instruction length allows it to approach twice the density of
standard ARM code while retaining most of the ARM’s performance advantage over a
traditional 16-bit processor using 16-bit registers. This is possible because Thumb code
operates on the same 32-bit register set as ARM code.
Thumb code provides up to 65 % of the code size of ARM and 160 % of the performance
of an equivalent ARM processor connected to a 16-bit memory system.
The particular flash implementation in the MPT612 also allows full speed execution in
ARM mode. It is recommended to program performance critical and short code sections
in ARM mode. The impact on the overall code size is minimal but the speed can be
increased by 30 % over Thumb mode.
7.2 On-chip flash program memory
The MPT612 incorporates a 32 kB flash memory system. This memory can be used for
both code and data storage. Programming flash memory can be performed in several
ways. It can be programmed in system using the serial port. The application program can
also erase and/or program the flash while the application is running, allowing a great
degree of flexibility for data storage field firmware upgrades, etc. The entire flash memory
is available for user code as the boot loader resides in a separate memory.
The MPT612 flash memory provides a minimum of 100 000 erase/write cycles and
20 years of data-retention memory.
7.3 On-chip static RAM
On-chip static RAM may be used for code and/or data storage. The SRAM may be
accessed as 8-bit, 16-bit and 32-bit. The MPT612 provide 8 kB of static RAM.
MPT612
All information provided in this document is subject to legal disclaimers.
NXP B.V. 2010. All rights reserved.
Product data sheet
Rev. 2 — 14 September 2010
9 of 9
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