參數(shù)資料
型號(hào): MPR084EJ
廠商: Freescale Semiconductor
文件頁數(shù): 37/40頁
文件大?。?/td> 0K
描述: IC CTLR TOUCH SENSR PROX 16TSSOP
產(chǎn)品目錄繪圖: MPR08(3,4)EJ Top
MPR08(3,4)EJ Side
標(biāo)準(zhǔn)包裝: 96
類型: 電容性
輸入數(shù)/鍵: 8
評(píng)估套件: 可供
數(shù)據(jù)接口: I²C,串行
電源電壓: 1.8 V ~ 3.6 V
電流 - 電源: 1.62mA
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 16-TSSOP(0.173",4.40mm 寬)
供應(yīng)商設(shè)備封裝: 16-TSSOP
包裝: 管件
產(chǎn)品目錄頁面: 2808 (CN2011-ZH PDF)
配用: KITMPR084EVM-ND - KIT EVAL 8-PAD TOUCH MPR084
MPR084
Sensors
6
Freescale Semiconductor
2.3.2
Start and Stop Conditions
Both SCL and SDA remain high when the interface is not busy. A master signals the beginning of a transmission with a START
(S) condition by transitioning SDA from high to low while SCL is high. When the master has finished communicating with the
slave, it issues a STOP (P) condition by transitioning SDA from low to high while SCL is high. The bus is then free for another
transmission.
Figure 6. Start and Stop Conditions
2.3.3
Bit Transfer
One data bit is transferred during each clock pulse (Figure 7). The data on SDA must remain stable while SCL is high.
Figure 7. Bit Transfer
2.3.4
Acknowledge
The acknowledge bit is a clocked 9th bit (Figure 8) which the recipient uses to handshake receipt of each byte of data. Thus each
byte transferred effectively requires 9 bits. The master generates the 9th clock pulse, and the recipient pulls down SDA during
the acknowledge clock pulse, such that the SDA line is stable low during the high period of the clock pulse. When the master is
transmitting to the MPR084, the MPR084 generates the acknowledge bit because the MPR084 is the recipient. When the
MPR084 is transmitting to the master, the master generates the acknowledge bit because the master is the recipient.
Figure 8. Acknowledge
DATA LINE STABLE
DATA VALID
CHANGE OF
DATA ALLOWED
SDA
SCL
START
CONDITION
SDA
SCL
STOP
CONDITION
P
S
START
CONDITION
SDA
BY TRANSMITTER
S
12
8
9
CLOCK PULSE FOR
ACKNOWLEDGEMENT
SDA
BY RECEIVER
SCL
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