18
User’s Manual U15075EJ1V0UM00
LIST OF FIGURES (2/5)
Figure No.
Title
Page
4-22
4-23
4-24
Format of Pull-Up Resistor Option Register B7...........................................................................................100
Format of Pull-Up Resistor Option Register B8...........................................................................................100
Format of Pull-Up Resistor Option Register B9...........................................................................................101
5-1
5-2
5-3
5-4
5-5
5-6
5-7
5-8
Block Diagram of Clock Generator..............................................................................................................104
Format of Processor Clock Control Register...............................................................................................105
Format of Suboscillation Mode Register .....................................................................................................106
Format of Subclock Control Register ..........................................................................................................107
External Circuit of Main System Clock Oscillator ........................................................................................108
External Circuit of Subsystem Clock Oscillator ...........................................................................................109
Examples of Incorrect Resonator Connection.............................................................................................110
Switching Between System Clock and CPU Clock......................................................................................114
6-1
6-2
6-3
6-4
6-5
6-6
6-7
6-8
6-9
6-10
6-11
6-12
Block Diagram of 16-Bit Timer.....................................................................................................................117
Format of 16-Bit Timer Mode Control Register 90.......................................................................................120
Format of Buzzer Output Control Register 90.............................................................................................121
Format of Port Mode Register 2..................................................................................................................122
Settings of 16-Bit Timer Mode Control Register 90 for Timer Interrupt Operation ......................................123
Timing of Timer Interrupt Operation ............................................................................................................124
Settings of 16-Bit Timer Mode Control Register 90 for Timer Output Operation.........................................125
Timer Output Timing....................................................................................................................................125
Settings of 16-Bit Timer Mode Control Register 90 for Capture Operation .................................................126
Capture Operation Timing (Both Edges of CPT90 Pin Are Specified) ........................................................126
16-Bit Timer Counter 90 Readout Timing....................................................................................................127
Settings of Buzzer Output Control Register 90 for Buzzer Output Operation..............................................128
7-1
7-2
7-3
7-4
7-5
7-6
7-7
7-8
7-9
7-10
7-11
7-12
7-13
Block Diagram of Timer 50..........................................................................................................................133
Block Diagram of Timer 60..........................................................................................................................134
Block Diagram of Output Controller (Timer 60)...........................................................................................135
Format of 8-Bit Timer Mode Control Register 50.........................................................................................139
Format of 8-Bit Timer Mode Control Register 60.........................................................................................141
Format of Carrier Generator Output Control Register 60 ............................................................................142
Format of Port Mode Register 3..................................................................................................................142
Timing of Interval Timer Operation with 8-Bit Resolution (Basic Operation)...............................................145
Timing of Interval Timer Operation with 8-Bit Resolution (When CRn0 Is Set to 00H) ...............................145
Timing of Interval Timer Operation with 8-Bit Resolution (When CRn0 Is Set to FFH)...............................146
Timing of Interval Timer Operation with 8-Bit Resolution (When CRn0 Changes from N to M (N
<
M)) .....146
Timing of Interval Timer Operation with 8-Bit Resolution (When CRn0 Changes from N to M (N
>
M)) .....147
Timing of Interval Timer Operation with 8-Bit Resolution (When Timer 60 Match Signal Is
Selected for Timer 50 Count Clock) ............................................................................................................148
Timing of Operation of External Event Counter with 8-Bit Resolution........................................................150
Timing of Square-Wave Output with 8-Bit Resolution.................................................................................152
7-14
7-15